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Newbie ivan.mitic
Newbie
862 Views
Registered: ‎02-27-2019

SS_OPTION_PORT_SAMPLE_TIMES_ASSIGNED problem

Hi,

I had some control loops implemented in control loops in System Generator installed with Vivado 2018.2.

I had to update to 2018.3 (reinstalled everything) and after the update my models are not working anymore...

I tried building a simpler model to see where the error is and I found out that it appears when I use the multipliers in the design.

For the attached model, I see the following error:

The S-function 'sysgen' in 'test/Gateway_Out' has specified the option SS_OPTION_PORT_SAMPLE_TIMES_ASSIGNED and specified inherited for sample time number 0. Inheriting a sample time is not supported when specifying SS_OPTION_PORT_SAMPLE_TIMES_ASSIGNED

Can you please help solving this?

Regards,

Ivan Mitic

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7 Replies
Moderator
Moderator
822 Views
Registered: ‎08-01-2007

回复: SS_OPTION_PORT_SAMPLE_TIMES_ASSIGNED problem

Gateway In and Gateway out blocks are to convert the data formats between simulink and Xilinx FPGA. You can imagine that design between Gateway In and Gateway blocks are implemented in FPGA and Gateway In and Gateway out are the respective input and output I/Os.

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Newbie ivan.mitic
Newbie
809 Views
Registered: ‎02-27-2019

回复: SS_OPTION_PORT_SAMPLE_TIMES_ASSIGNED problem

Hi,

Thank you for your answer!

I understand that, but that doesnt help me too much. The design can not simulate because of this problem and I think the error was trigered by this update.

If you check the error file, you will see that he error actually propagated from the multiplier:

--------------------------------- Version Log ----------------------------------
Version Path
System Generator 2018.3 C:/Xilinx/Vivado/2018.3
Matlab 9.4.0.813654 (R2018a) C:\Program Files\MATLAB\R2018a
Vivado 2018.3 C:/Xilinx/Vivado/2018.3
--------------------------------------------------------------------------------
Summary of Errors:
Error 0001: Error loading IP information
Block: 'test/Mult'
--------------------------------------------------------------------------------

Error 0001:

Reported by:
'test/Mult'

Details:
Cannot determine the optimum latency for the Multipler core.
Error occurred during "Rate and Type Error Checking".

--------------------------------------------------------------------------------

The SS_OPTION_PORT_SAMPLE_TIMES_ASSIGNED  was a consequence of a propagated error from the multiplier, but I do not know what caused that either.

Can you please review our case again?

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Moderator
Moderator
792 Views
Registered: ‎08-01-2007

回复: SS_OPTION_PORT_SAMPLE_TIMES_ASSIGNED problem

This is wired, the Multiplier allows the user to set latency. Have you tried to set the latency of Multiplier?

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Newbie ivan.mitic
Newbie
781 Views
Registered: ‎02-27-2019

回复: SS_OPTION_PORT_SAMPLE_TIMES_ASSIGNED problem

The latency is set to 3. I tried changing it and it did not help...

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Moderator
Moderator
752 Views
Registered: ‎08-16-2018

Re: SS_OPTION_PORT_SAMPLE_TIMES_ASSIGNED problem

@ivan.mitic @nathanx 

I tested the design on my machine and it is working fine with SysGen 2018.3 & Matlab 2018a (see attached figure). 

The issues seems to be related to 'installation'. I will get back you after finding the root cause of the error. 


/ 7\7     Meher Krishna Patel, PhD
\ \        Senior Product Application Engineer, Xilinx
/ /        
\_\/\7   It is not so much that you are within the cosmos as that the cosmos is within you...
Screenshot_1.jpg
Moderator
Moderator
744 Views
Registered: ‎08-16-2018

Re: SS_OPTION_PORT_SAMPLE_TIMES_ASSIGNED problem

@ivan.mitic 

Most probable reason could be old SysGen Cache. You have updated the SysGen 2018.3, but SysGen seems to be using the older cache for the design. Please delete the cache and then run the design again. Follow the below steps for clearing the cache, 

 

  1. Run the command ‘xilinx.environment.getcachepath’ in Matlab's command-window. 
  2. Above command will show the location of cache folder. Go to that folder and delete everything.
  3. Then run your design again.

/ 7\7     Meher Krishna Patel, PhD
\ \        Senior Product Application Engineer, Xilinx
/ /        
\_\/\7   It is not so much that you are within the cosmos as that the cosmos is within you...
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Newbie ivan.mitic
Newbie
724 Views
Registered: ‎02-27-2019

Re: SS_OPTION_PORT_SAMPLE_TIMES_ASSIGNED problem

It didnt help. The errors are the same.

Are there more directories which are used to store data and are not deleted after the uninstall?

I can try a fresh install as well, but I will need to delete these directories manually.

 

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