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Visitor
Visitor
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Registered: ‎08-10-2019

There is only one line with a value of zero when I use co-simulation.

Hello,

I have encountered some problems,when using the system generator for co-simulation, the output waveform of the JTAG module has only one line with a value of zero. The built system is normal in simulink.Pictures are as follows。Thank you very much.

屏幕截图(13).pngnormal.jpgscope_abnormal.jpg

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Moderator
Moderator
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Registered: ‎08-16-2018

Can you please share the ouput when you connect the "input port of Cosim block with output of Gateway-In port (rather than direct connection with input)".

 

It should work fine after above change. 


/ 7\7     Meher Krishna Patel, PhD
\ \        Senior Product Application Engineer, Xilinx
/ /        
\_\/\7   It is not so much that you are within the cosmos as that the cosmos is within you...
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Visitor
Visitor
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Registered: ‎08-10-2019

First of all, thanks for your answer. I have tried this method but there is only one output with zero.

Yesterday I tried a simple additon and the output was zero. It is wrong.

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Moderator
Moderator
352 Views
Registered: ‎08-16-2018

Can you please share the FPGA-board number.

/ 7\7     Meher Krishna Patel, PhD
\ \        Senior Product Application Engineer, Xilinx
/ /        
\_\/\7   It is not so much that you are within the cosmos as that the cosmos is within you...
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Visitor
Visitor
329 Views
Registered: ‎08-10-2019

I use the development board of zynq7020.

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