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198 Views
Registered: ‎05-25-2018

sysgen Fixed point error on hardware (ok when simulated)

If we have a signed gateway and then use a signed interpret block, then when a add or multiply block is called, it doesn’t move the sign bit to take account of the new output size when executed on hardware (viewed using the ILA), thus corrupting the data. Yet, when the simulations / test benches are executed, these give the correct response.
To make things even more difficult, why have the radix option been removed from the ILA?
It is ok if I change the gateway and interpret block to unsigned.
Shouldn’t the simulation/test benches give the same result as the ILA on the actual hardware?

sysgenfixedpointerror.JPG
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Registered: ‎08-01-2007

回复: sysgen Fixed point error on hardware (ok when simulated)

The issue description does not make much sense, but the sysgen simulation should match the hardware, otherwise there is an issue.

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