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jorge_2015
Adventurer
Adventurer
744 Views
Registered: ‎12-06-2017

DPU-TRD output files Vitis-AI

Hi,

I have built Vitis-AI/DPU-TRD project and I can see the next files 

Vitis-AI/DPU-TRD/prj/Vitis/binary_container_1/sd_card$ ls
BOOT.BIN  dpu.xclbin  image.ub  init.sh  platform_desc.txt  README.txt  zcu102_base.hwh

My question is if bitstream is embedded inside BOOT.BIN what is dpu.xclbin for?

Do I need to copy it to my sd_card?

I am seeing that xclbin is a container which packs FPGA bitstream for the DFX partition and host of related metadata like clock frequencies, information about instantiated compute units, etc.

Can I use xclbin instead of the .bit inside the BOOT.BIN for and embedded device? Or is this way of working more focused to Alveo boards?  

 

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jheaton
Xilinx Employee
Xilinx Employee
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Registered: ‎03-21-2008

BOOT.bin contains the bitstream for the platform. The platform does not contain any acceleration kernels, including the dpu. Think of this as the "static" part of the design. It nevers changes.

All acceleration kernels (.xclbins),  get loaded into the PL at runtime by XRT. This includes the dpu.xclbin.

 

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jorge_2015
Adventurer
Adventurer
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Registered: ‎12-06-2017

Hi @jheaton ,

Thank you for your answer, about what you told me a question has come to my mind:

How does it know the XRT in runtime which acceleration kernel must use? Just copying it from sd card to /usr/lib and exporting paths like in setup.sh it's enough?

Or you have to put a reference to the xclbin in a meta.json file like in alveo examples for an embedded device?

BR

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jheaton
Xilinx Employee
Xilinx Employee
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Registered: ‎03-21-2008

For general Vitis accleration kernels, your host sw would load the kernel (xclbin). There are examples of how to do this in the Vitis documentation.

The dpu xclbin is  a special case, the Vitis AI libraries call xrt under the hood and load the xlcbin for you. In this case you just need to copy the xclbin to the target file system and it will get loaded for you.Capture.PNG

 

hrexha
Adventurer
Adventurer
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Registered: ‎11-13-2019

Hello @jheaton,

Regarding the matter, I had one question. Is it possible to build the BOOT.BIN file form petalinux with platform .bit file included and then use it with dpu.xclbin I get from Vitis flow. I had problems when loading the xclbin for executing Vitis-AI library samples. There is some time-out or something. So I  use the BOOT.BIN file I get from vitis flow, which I would not like to. Do you have any idea why?

Thanks.

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hokim
Scholar
Scholar
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Registered: ‎10-21-2015

Hi

xclbin consists of a hw bitstream and meta data for xrt

The bitstream in xclbin is actually not used in zynq(mp) platform(which doesn't use partial reconfiguration for hw) .

So you can change  hw by modifying the bitstream in boot.bin

But you should be careful to change hw because meta data has hw information and its inconsistency with actual hw might cause problem.

Check log after dpu project build

link.steps.log

step: running xclbinutil
timestamp: 27 Jun 2020 15:32:32
cmd: xclbinutil --add-section BITSTREAM:RAW:/home/hokim/work/vitis_ai/dpu_prj/binary_container_1/link/int/system.bit --force --key-value SYS:mode:flat --add-section :JSON:/home/hokim/work/vitis_ai/dpu_prj/binary_container_1/link/int/dpu.rtd --add-section CLOCK_FREQ_TOPOLOGY:JSON:/home/hokim/work/vitis_ai/dpu_prj/binary_container_1/link/int/dpu_xml.rtd --add-section BUILD_METADATA:JSON:/home/hokim/work/vitis_ai/dpu_prj/binary_container_1/link/int/dpu_build.rtd --add-section EMBEDDED_METADATA:RAW:/home/hokim/work/vitis_ai/dpu_prj/binary_container_1/link/int/dpu.xml --add-section SYSTEM_METADATA:RAW:/home/hokim/work/vitis_ai/dpu_prj/binary_container_1/link/int/systemDiagramModelSlrBaseAddress.json --key-value SYS:PlatformVBNV:em.avnet.com_ultra96v2_ultra96v2_base_1_0 --output /home/hokim/work/vitis_ai/dpu_prj/binary_container_1/link/int/dpu.xclbin

dpu.rtd and dpu.xml are used for xrt

hw modification should be based on dpu_prj/binary_container_1/link/vivado/vpl/prj/prj.xpr

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