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Anonymous
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Customizing DMA Simple Register Example

Hi, 

I have looked a the DMA example "xaxidma_example_simple_poll.c". It start sending data from PS to PL through AXI DMA. I have tested this example by looping the AXI Stream FIFO, which actually works. I am wondering how to customize it to only receive the streaming data from PL instead of sending data to PL. Is there any customize version of this example ? 

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Xilinx Employee
Xilinx Employee
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Registered: ‎10-04-2016

Re: Customizing DMA Simple Register Example

Hi @Anonymous,

The examples in this AR are a little dated, but you might find them helpful.

https://www.xilinx.com/support/answers/57550.html

Regards,

Deanna

 

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