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Adventurer
Adventurer
370 Views
Registered: ‎01-26-2017

Controlling AXI slave DDR4 from PL state machine

Hi all,

 

I wrote data to DDR4 via AXI DMA in MicroBlaze. Now on PL side I want to read the data. Because the DDR4 is connected to AXI DMA, the interface that I must use to drive the DDR4 from PL side is also AXI interface. I have written a simple state machine that asserts ARVALID, and then waits for slave to assert ARREADY (which never happens) and then waits RVALID to be asserted before asserting RREADY. 

 

i.e the problem is that ARREADY stays low forever

 

I checked the RRESP signal and it stays 0, which according to AXI spec indicates everything okay.

 

What could be causing ARREADY to never go high? Do I somehow have to release the DMA in PS/MicroBlaze side so that the DDR4 slave can signal ARREADY?

 

I've used the following AXI settings:

ARBURST = INCR (1b01),

ARLEN = (0x00) ---> burst length =  1

ARSIZE = 1b010 ---> read burst size is 4 bytes, because I wrote 32 bit values to DDR4 and want to read 32 bits each burst

 

Thanks for your time

 

 

--- Estimated Development time: 2*Pi*(planned completion date) ---
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Adventurer
Adventurer
342 Views
Registered: ‎01-26-2017

Re: Controlling AXI slave DDR4 from PL state machine

I've found that many of my control signals are driven by driver cell "GND". This explains why I am seeing zeros only for rvalid and arready - if they are tied to ground they will never assert. Still trying to find out why this is the case though

--- Estimated Development time: 2*Pi*(planned completion date) ---
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