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MicroZed Chronicles: PetaLinux and XADC

Xilinx Employee
Xilinx Employee
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This content is republished from the MicroZed Chronicles, with permission from the author and Hackster.io.

 

Over the five plus years that this blog has now run, without a doubt some of the most popular blogs are on the XDAC / Sysmon functionality

My last couple of blogs have been demonstrating how we can work with PetaLinux in our MicroBlaze systems (P1, P2, and P3).

In this blog I am going to show how we can get the XADC up and running such that we can monitor both the device supply voltages, die temperature and external signals. 

Believe it or not in our MicroBlaze system the design already contains a XADC, it is just not accessible to the MicroBlaze. 

The Memory Interface Generator(MIG) implemented previously to work with the DDR memory contains a XADC. It uses the XADC die temperature channel to compensate the DDR timings across the temperature range. 

The first step is therefore to make the XADC in the design accessible to the MicroBlaze. To do this we need to re-customise the MIG and disable the XADC instantiation.

Disabling the XADC in MIG will result in the MIG having a new input. This input is used to provide the temperature information to the MIG. 

 

Fig1 Disabling the XADC instantiation in the MIG.png

Disabling the XADC instantiation in the MIG

 

With the XADC instantiation disabled in the MIG, we can then add in a new XADC in the block diagram. 

When we re-customise the XADC, we can enable the Temp Bus. This will create a output on the XADC IP block which can be connected to the MIG and provide the temperature information. 

Fig2 Disabling the XADC instantiation in the MIG.png

Customising the XADC

 

We can then connect the XADC into the MicroBlaze memory and connect the external Vp/Vn ports so we can sample external signals. 

In the diagram below you can see the XADC and the MIG (highlighted) and the temp bus connecting them.

Fig3 XADC & MIG.png

XADC & MIG

 

As we have changed the under laying Vivado design we again need to rebuild the PetaLinux image. 

However, because I have changed the DDR interface, I decided that before I rebuilt the PetaLinux image I would re-run the bare metal Memory Test application. This allows me to confirm the minor changes have not impacted the DDR. The DDR is critical as that is where the PetaLinux OS and File System will be executing from. 

Fig4 DDR Memory Test.png

DDR Memory Test

 

With the DDR working, the next stage is to update the hardware definition in the PetaLinux project and then to configure the PetaLinux project for the XADC. 

We can update the PetaLinux project by running the command below 

petalinux-config — get-hw-description <path to HDF>

Once this is loaded, we can exit the PetaLinux configuration, without making any changes. 

We do however, need to change the PetaLinux kernel configuration. Enter the command 

petalinux-config -c kernel 

The XADC driver is contained within the Industrial Input Output driver support (IIO). 

In the kernel configuration, we therefore need to select Device Drivers and then enable Industrial I/O support. 

Fig5 Enable IIO.png

Enable IIO

 

Once the IIO is enabled, the XADC is contained within the Analog to Digital Converters support.

Fig6 Select the Analog to Digital Support.png

Select the Analog to Digital Support

 

In the Analog to Digital support, scroll down until you can see XADC driver and enable it

Fig7 Enabling the XADC driver.png

Enabling the XADC driver

 

Save the kernel configuration and exit. 

We can now build the PetaLinux Image using the command 

petalinux-build

Once this has completed, we can boot the image using the commands 

petalinux-boot –-jtag –-fpga

petalinux-boot –-jtag –-kernel

Once the system boots we can double check that we can see the XADC in the PetaLinux system 

To see the XADC is present we can look in the directory 

/sys/devices/platform/amba_pl

Here you should see the XADC and the physical address assigned in Vivado.

Fig8 Enabling the XADC console 1.png

As the XADC is a IIO device we access it via /sys/bus/iio 

Fig9 XADC console 2.png

If we change directory into /sys/bus/iio/devices you will see a IIO:device0 this is XADC however, to double check this we can run the command 

cat /sys/bus/iio/devices/iio:device0/name 

Fig10 XADC console 3.png

Confirmation IIO:device0 is the XADC

 

To understand what parameters we can read over this interface we can change directory into 

cd /sys/bus/iio/devices/iio:devcies0

In this directory we can then run the ls command which will list the parameters which can be read via the XADC 

Fig11 Parameters Available for reading.png

Parameters Available for reading

 

We can then read the ADC value, either in raw format or scaled using the command

cat /sys/bus/iio/devices/iio:devices0/in_voltage0_vccint_scale 

cat /sys/bus/iio/devices/iio:devices0/in_voltage0_vccint_raw

Fig12  Raw and Scaled Values read for VCCInt.png

Raw and Scaled Values read for VCCInt

 

While we can use sys fs to read the XADC we should create a C or C++ application if we want to use the XADC in anger. 

Rather helpfully Xilinx provides a driver which can be used on the Xilinx GitHub.

 

See My FPGA / SoC Projects: Adam Taylor on Hackster.io

Get the Code: ATaylorCEngFIET (Adam Taylor)

Access the MicroZed Chronicles Archives with over 280 articles on the Zynq / Zynq MpSoC updated weekly at MicroZed Chronicles.