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Explorer
Explorer
10,045 Views
Registered: ‎11-28-2011

Actual Read/Write Width FIFO Generator v9.3 question

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Need to generate a FIFO that will write 64, 64-bit data values, and be able to read that data 16-bits at a time.  Independent clocks. 

 

The v9.3 GUI states that the Actual write depth is 63 and the Actual read depth is 252.  Does this imply that I can't read all of the data that I wrote? 

 

Do i have to bump up the write depth to 128, and use programmable thresholds to get the actual write and read depths equal to 64, and 256, respectively?

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Xilinx Employee
Xilinx Employee
15,802 Views
Registered: ‎02-06-2013

Re: Actual Read/Write Width FIFO Generator v9.3 question

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Hi

 

you can increase the depth to 128 and can set the programmable full threshold to 64 and programmable empty threshold to 256 to control the data input and output  from the FIFO as per your requirement.

Regards,

Satish

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Xilinx Employee
Xilinx Employee
10,044 Views
Registered: ‎02-06-2013

Re: Actual Read/Write Width FIFO Generator v9.3 question

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Hi

 

yes the actual depth will be different from the configured depth depending on the parameters selected.

 

However you can read all the data that is written into the FIFO.

 

Input actual data written 64*63=4032 and actual data read will be 16*252=4032.

 

If  you require exactly 64*64=4096 for your application then you can go for higher depths.

Regards,

Satish

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Explorer
Explorer
10,040 Views
Registered: ‎11-28-2011

Re: Actual Read/Write Width FIFO Generator v9.3 question

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Yes, I would require exactly 64x64 so I would have to increase the depth. Only thing is I need an indication that all 64 x 64 have been read and written. In that case, I sort of need a pseudo half full/empty flag.

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Xilinx Employee
Xilinx Employee
15,803 Views
Registered: ‎02-06-2013

Re: Actual Read/Write Width FIFO Generator v9.3 question

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Hi

 

you can increase the depth to 128 and can set the programmable full threshold to 64 and programmable empty threshold to 256 to control the data input and output  from the FIFO as per your requirement.

Regards,

Satish

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Xilinx Employee
Xilinx Employee
9,847 Views
Registered: ‎08-01-2008

Re: Actual Read/Write Width FIFO Generator v9.3 question

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please refer below ARs

http://www.xilinx.com/support/answers/23075.htm
Thanks and Regards
Balkrishan
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