UPGRADE YOUR BROWSER

We have detected your current browser version is not the latest one. Xilinx.com uses the latest web technologies to bring you the best online experience possible. Please upgrade to a Xilinx.com supported browser:Chrome, Firefox, Internet Explorer 11, Safari. Thank you!

cancel
Showing results for 
Search instead for 
Did you mean: 
Highlighted
Adventurer
Adventurer
1,326 Views
Registered: ‎01-05-2017

Block Memory Generator failed to initialise IP model for asy schematic symbol

 

Hi

 

I'm trying to use a single port ram using IP modules however I'm getting the above warning and there is no IP module generated in the end. I'm also using clock core IP which is working properly. So could anyone explain how to generate a memory block IP module ? 

 

p.s : Some people suggest using core generator (tools -> core generator ...) and uncheck ASY generation. But this generates a new project in my current project and I don't know how to proceed. There are two files generated a vhdl model of the bram and a " .ngc " file (I  couldn't achieve to open). So I don't know what to do with this ngc file. 

 

p.s 2: I'm using ubuntu 16.04

 

p.s 3: Complete warning message : WARNING:sim:946 - Failed to initialise IP Model for ASY schematic symbol

 

Thanks in advance

0 Kudos
4 Replies
Voyager
Voyager
1,313 Views
Registered: ‎06-24-2013

Re: Block Memory Generator failed to initialise IP model for asy schematic symbol

Hey @macellan85,

 

I'm trying to use a single port ram using IP modules ...

Are you referring to a BRAM you want to use in a block design here?

If so, what size/interface do you want/need?

 

There are two files generated a vhdl model of the bram and a " .ngc " file

(I  couldn't achieve to open). So I don't know what to do with this ngc file.

The NGC file is a netlist with constraint information.

It is usually included in implementation or simulation.

 

Best,

Herbert

-------------- Yes, I do this for fun!
0 Kudos
Xilinx Employee
Xilinx Employee
1,216 Views
Registered: ‎08-01-2008

Re: Block Memory Generator failed to initialise IP model for asy schematic symbol

you can safely ignore this warning. Are you seeing any functional issue.

check IP catalog flow if you want to fix this warning
Thanks and Regards
Balkrishan
--------------------------------------------------------------------------------------------
Please mark the post as an answer "Accept as solution" in case it helped resolve your query.
Give kudos in case a post in case it guided to the solution.
0 Kudos
Adventurer
Adventurer
1,204 Views
Registered: ‎01-05-2017

Re: Block Memory Generator failed to initialise IP model for asy schematic symbol

Hey @hpoetzl yes I want to use single port bram through block memory generator, 8 bit width x 256 byte depth. Is there a different method for BRAM than clock core IP?

 

new source -> IP  -> block memory generator -> single port ram ...

 

 

@balkris there is no IP generated just a warning message.

0 Kudos
Xilinx Employee
Xilinx Employee
1,200 Views
Registered: ‎08-01-2008

Re: Block Memory Generator failed to initialise IP model for asy schematic symbol

can you please share test case to reproduce this issue
Thanks and Regards
Balkrishan
--------------------------------------------------------------------------------------------
Please mark the post as an answer "Accept as solution" in case it helped resolve your query.
Give kudos in case a post in case it guided to the solution.
0 Kudos