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Explorer
Explorer
14,474 Views
Registered: ‎04-11-2016

Error: [Labtools 27-3165] End of startup status: LOW

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Hi, 

I read already some info about it:

https://forums.xilinx.com/t5/7-Series-FPGAs/JTAG-without-PUDC-B/td-p/634728

but it not seems to be helpful.

 

I am trying to load .bit file on a custom FPGA(xc7k325) board but getting error as in attachment.

 

I did as mentioned in the above link:

"PUDC_B must be tied either directly, or via a ≤ 1 kΩ to VCCO_14 or GND." but it didn't work.

 

surprising to me when I load just simple program (like led blinking) it works but with my program it shows the error.  is there any other reason for this error?

Because i have taken a xilinx reference design which is already working with kc705 evaluation board.

https://www.xilinx.com/support/documentation/application_notes/xapp1199-smpte2022-56-over-ip.pdf

 

only thing I changed here is I mapped the pins as per custom board. All other things is same as evaluation board.

 

Is there any additional setting needed in project setting during bitstream generation.

 

 

2.jpg
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1 Solution

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Explorer
Explorer
22,918 Views
Registered: ‎04-11-2016

Re: Error: [Labtools 27-3165] End of startup status: LOW

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Hi,
thanks sudden voltage drop was the problem.

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7 Replies
Instructor
Instructor
14,450 Views
Registered: ‎08-14-2007

Re: Error: [Labtools 27-3165] End of startup status: LOW

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It's possible that the project causes the FPGA to draw more power than your board can support, which would then lower Vccint enough to reset the FPGA.  I would suggest scoping on Vccint as close as possible to the FPGA to see if there is a dip in voltage when you configure the part.

 

There are two reasons that the voltage could drop, first that it exceeds the capacity of the supply, and second that the sudden increase in current causes the supply to dip briefly and there is not enough bulk bypass capacitance to hold the voltage above the minimum required to retain configuration.

-- Gabor
Explorer
Explorer
14,443 Views
Registered: ‎04-11-2016

Re: Error: [Labtools 27-3165] End of startup status: LOW

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Hi,

here is further info, if it helps to understand the problem:

Status of configuration register:

 

REGISTER.CONFIG_STATUS 01000000000000000001110100001100
REGISTER.CONFIG_STATUS.BIT00_CRC_ERROR 0
REGISTER.CONFIG_STATUS.BIT01_DECRYPTOR_ENABLE 0
REGISTER.CONFIG_STATUS.BIT02_PLL_LOCK_STATUS 1
REGISTER.CONFIG_STATUS.BIT03_DCI_MATCH_STATUS 1
REGISTER.CONFIG_STATUS.BIT04_END_OF_STARTUP_(EOS)_STATUS 0
REGISTER.CONFIG_STATUS.BIT05_GTS_CFG_B_STATUS 0
REGISTER.CONFIG_STATUS.BIT06_GWE_STATUS 0
REGISTER.CONFIG_STATUS.BIT07_GHIGH_STATUS 0
REGISTER.CONFIG_STATUS.BIT08_MODE_PIN_M[0] 1
REGISTER.CONFIG_STATUS.BIT09_MODE_PIN_M[1] 0
REGISTER.CONFIG_STATUS.BIT10_MODE_PIN_M[2] 1
REGISTER.CONFIG_STATUS.BIT11_INIT_B_INTERNAL_SIGNAL_STATUS 1
REGISTER.CONFIG_STATUS.BIT12_INIT_B_PIN 1
REGISTER.CONFIG_STATUS.BIT13_DONE_INTERNAL_SIGNAL_STATUS 0
REGISTER.CONFIG_STATUS.BIT14_DONE_PIN 0
REGISTER.CONFIG_STATUS.BIT15_IDCODE_ERROR 0
REGISTER.CONFIG_STATUS.BIT16_SECURITY_ERROR 0
REGISTER.CONFIG_STATUS.BIT17_SYSTEM_MONITOR_OVER-TEMP_ALARM_STATUS 0
REGISTER.CONFIG_STATUS.BIT18_CFG_STARTUP_STATE_MACHINE_PHASE 000
REGISTER.CONFIG_STATUS.BIT21_RESERVED 0000
REGISTER.CONFIG_STATUS.BIT25_CFG_BUS_WIDTH_DETECTION 00
REGISTER.CONFIG_STATUS.BIT27_HMAC_ERROR 0
REGISTER.CONFIG_STATUS.BIT28_PUDC_B_PIN 0
REGISTER.CONFIG_STATUS.BIT29_BAD_PACKET_ERROR 0
REGISTER.CONFIG_STATUS.BIT30_CFGBVS_PIN 1
REGISTER.CONFIG_STATUS.BIT31_RESERVED 0

 

considering the voltage drop/increase i will check and let you know.

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Explorer
Explorer
22,919 Views
Registered: ‎04-11-2016

Re: Error: [Labtools 27-3165] End of startup status: LOW

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Hi,
thanks sudden voltage drop was the problem.

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Visitor shparekh
Visitor
11,579 Views
Registered: ‎05-10-2017

Re: Error: [Labtools 27-3165] End of startup status: LOW

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How did you dump the configuration status registers in Vivado?

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Visitor zilgard
Visitor
9,359 Views
Registered: ‎11-07-2017

Re: Error: [Labtools 27-3165] End of startup status: LOW

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Me with the same problem. How to solve it, please?
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Newbie liuxueyu
Newbie
8,796 Views
Registered: ‎09-25-2017

Re: Error: [Labtools 27-3165] End of startup status: LOW

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Is this problem solved?
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Participant michaeltymcnamara
Participant
7,927 Views
Registered: ‎07-08-2013

Re: Error: [Labtools 27-3165] End of startup status: LOW

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To dump the config_status register, in Vivado, right click on the FPGA you just (tried to) program in the hardware manager.

Select the first menu item, Hardware Device Properties. (at least it was first in Vivado 2016.2)

 

A Properties pane opens below the Hardware Manager pane.
At the bottom of this pane, select Properties (rather than General)

Open up the Registers item

Open of the CONFIG_STATUS register.

 

Why am I answering this? Because it is sad to see asked but not answered questions; and more so, because I have this same problem with an ADRV1CCR-FMC carrier card, and a ADRV9361-ZC7035 FPGA plugged in to it.

 

After programming, I get this error, and the CONFIG_REGISTER says:

 

REGISTER.CONFIG_STATUS 01000110000000000001111100001100
REGISTER.CONFIG_STATUS.BIT00_CRC_ERROR 0
REGISTER.CONFIG_STATUS.BIT01_DECRYPTOR_ENABLE 0
REGISTER.CONFIG_STATUS.BIT02_PLL_LOCK_STATUS 1
REGISTER.CONFIG_STATUS.BIT03_DCI_MATCH_STATUS 1
REGISTER.CONFIG_STATUS.BIT04_END_OF_STARTUP_(EOS)_STATUS 0
REGISTER.CONFIG_STATUS.BIT05_GTS_CFG_B_STATUS 0
REGISTER.CONFIG_STATUS.BIT06_GWE_STATUS 0
REGISTER.CONFIG_STATUS.BIT07_GHIGH_STATUS 0
REGISTER.CONFIG_STATUS.BIT08_MODE_PIN_M[0] 1
REGISTER.CONFIG_STATUS.BIT09_MODE_PIN_M[1] 1
REGISTER.CONFIG_STATUS.BIT10_MODE_PIN_M[2] 1
REGISTER.CONFIG_STATUS.BIT11_INIT_B_INTERNAL_SIGNAL_STATUS 1
REGISTER.CONFIG_STATUS.BIT12_INIT_B_PIN 1
REGISTER.CONFIG_STATUS.BIT13_DONE_INTERNAL_SIGNAL_STATUS 0
REGISTER.CONFIG_STATUS.BIT14_DONE_PIN 0
REGISTER.CONFIG_STATUS.BIT15_IDCODE_ERROR 0
REGISTER.CONFIG_STATUS.BIT16_SECURITY_ERROR 0
REGISTER.CONFIG_STATUS.BIT17_SYSTEM_MONITOR_OVER-TEMP_ALARM_STATUS 0
REGISTER.CONFIG_STATUS.BIT18_CFG_STARTUP_STATE_MACHINE_PHASE 000
REGISTER.CONFIG_STATUS.BIT21_RESERVED 0000
REGISTER.CONFIG_STATUS.BIT25_CFG_BUS_WIDTH_DETECTION 11
REGISTER.CONFIG_STATUS.BIT27_HMAC_ERROR 0
REGISTER.CONFIG_STATUS.BIT28_PUDC_B_PIN 0
REGISTER.CONFIG_STATUS.BIT29_BAD_PACKET_ERROR 0
REGISTER.CONFIG_STATUS.BIT30_CFGBVS_PIN 1
REGISTER.CONFIG_STATUS.BIT31_RESERVED 0

 

I am still in search of what to do to fix this.