UPGRADE YOUR BROWSER

We have detected your current browser version is not the latest one. Xilinx.com uses the latest web technologies to bring you the best online experience possible. Please upgrade to a Xilinx.com supported browser:Chrome, Firefox, Internet Explorer 11, Safari. Thank you!

cancel
Showing results for 
Search instead for 
Did you mean: 
649 Views
Registered: ‎08-24-2018

Partial Reconfiguration on PYNQ

Hello all,

 
I want to implement a simple partial reconfiguration project on PYNQ. I designed a very simple project in Vivado and tried to download the partial part on PYNQ but when I want to download the partial part, the board halts and does not work. I attached a file that shows the details for this project and also the tutorial file by which the project is designed. I appreciate if one can help me to fix the problem.
0 Kudos
3 Replies
Moderator
Moderator
550 Views
Registered: ‎01-15-2008

Re: Partial Reconfiguration on PYNQ

can you try to add the failing partial part to be the initial design with full bitstream and see if this works fine, this is to see if the issue is in design files or in the partial design flow

0 Kudos
540 Views
Registered: ‎08-24-2018

Re: Partial Reconfiguration on PYNQ

I did that. It is working. It is a very simple functionality. Do I need partial reconfiguration decoupler for each port connected to the static part?

0 Kudos
Xilinx Employee
Xilinx Employee
452 Views
Registered: ‎11-17-2008

Re: Partial Reconfiguration on PYNQ

mmehrabi@asu.edu,

Adding decouplers would be a wise next step.  The question to answer is why the board stops working?  If the act of reconfiguration is the trigger, there could be some unexpected event from the reconfiguring region that is not handled well by the static design.  Adding decouplers freezes activity on the outputs to prevent unpredictable behavior.  You could also add debug logic (ILA cores) to monitor internal activity before, during and after partial reconfiguration to find the source of the issue.  But overall, you know your design best.  Would unpredictable transitions on the RP interface cause the behavior you are seeing?

thanks,

david.