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Observer tamiro
Observer
2,018 Views
Registered: ‎09-11-2017

Why does re-configuration through ICAPE2 iprog takes longer than regular configuration

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Hello,

I'm using ICAPE2 in an Artix7 in order to reset my design.

I write the sequence described in table 7-1 UG470 (IPROG through ICAPE2)

This works fine and the FPGA re-load from the SPI flash (I'm in master SPI mode at Quad SPI).

But for some reason it takes much longer that the regular power on configuration.

At power up it takes the FPGA to load from the flash ~1.7s

While after re-configuration through the IPROG It takes an additional ~11s before what seems to be regular configuration.

Does anyone know what it does before re-configuring?

And how can I short the process?

I see the CCLK toggling throughout this time.

Thanks.

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Xilinx Employee
Xilinx Employee
2,617 Views
Registered: ‎01-10-2012

Re: Why does re-configuration through ICAPE2 iprog takes longer than regular configuration

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Hi @tamiro

 

https://www.xilinx.com/support/answers/53055.html

 

Yes. if that is the case it makes sense for the behavior you are seeing. Hence we don't support multi die Flash of such type.

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Moderator
Moderator
1,983 Views
Registered: ‎01-15-2008

Re: Why does re-configuration through ICAPE2 iprog takes longer than regular configuration

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when you inititate Iprog command what is the WBSTAR register pointing to?

are you using multiboot or single image configuration?

Observer tamiro
Observer
1,979 Views
Registered: ‎09-11-2017

Re: Why does re-configuration through ICAPE2 iprog takes longer than regular configuration

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I'm using a single image.

I've tried with 2 different: WBSTAR (0x0 when the image resides starting from 0 and 0x00990000 when the image starts there).

What I see is that cclk toggles at 3MHz for the 11s I can't explain and then it switches to 12MHz as suppose to (what I configured in the configuration image).  

Xilinx Employee
Xilinx Employee
1,960 Views
Registered: ‎01-10-2012

Re: Why does re-configuration through ICAPE2 iprog takes longer than regular configuration

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Hi @tamiro

 

What is the Flash size that you are using ?

Presuming its over 128Mb, if so please go through the UG470 Table 7-2 Notes section !

 

 

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Observer tamiro
Observer
1,887 Views
Registered: ‎09-11-2017

Re: Why does re-configuration through ICAPE2 iprog takes longer than regular configuration

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Hi Gurupra,

You were right, I have missed the note - Thank you.

However now after I have taken it into account I see a different behavior.

I have written to the Flash at address 0x100 the sync word, my WBSTAR address and Iprog command.

And then the FPGA image at the WBSTAR address.

At power up the FPGA configures correctly.

After reset through the ICAPE2 The FPGA fails to configure.

When I read the configuration registers I see that the WBSTAR address was updated to my WBSTAR address

but the Boot status has only the bit 0 (status valid) bit on.

What am I missing?

 

Thanks.

 

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Xilinx Employee
Xilinx Employee
1,879 Views
Registered: ‎01-10-2012

Re: Why does re-configuration through ICAPE2 iprog takes longer than regular configuration

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Hi @tamiro

 

Can you share the details of the relevant bit stream settings you used. ? Hope you have enabled spi32 address mode ?

Also share the  config/boot status captures.  

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Observer tamiro
Observer
1,872 Views
Registered: ‎09-11-2017

Re: Why does re-configuration through ICAPE2 iprog takes longer than regular configuration

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Hi,

 

These are the bit stream settings I'm using:

BITSTREAM.CONFIG.SPI_BUSWIDTH 4

BITSTREAM.CONFIG.CONFIGRATE 12

BITSTREAM.CONFIG.UNUSEDPIN pullnone

BITSTREAM.CONFIG.SPI_32BIT_ADDR YES

 

I have noticed that if I read from the SPI flash through my application (after the FPGA has configured correctly) and then I reset through the ICAPE2 it re-configures as expected (the same timing as during power up).

But if I reset through the ICAPE2 without preforming a SPI read it does not re-configure the FPGA just resets it and get stuck

(cclk keeps toggling at 3MHz forever).

 

Your help is appreciated

thank you.

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Xilinx Employee
Xilinx Employee
1,856 Views
Registered: ‎01-10-2012

Re: Why does re-configuration through ICAPE2 iprog takes longer than regular configuration

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Hi @tamiro

 

Not sure what to make of the behavior based on your explanation. Not sure how/why your initial read to SPI should affect the behavior, as long as the WBSTAR address is set correctly and you are issuing  IPROG (assuming the intended image is correctly programmed in Flash at the WBSTAR address) the config should jump to specified address.

Can you check if you are doing something diffrenet before and after the SPI Read, when you issue IPROG.

 

Also please share the Boot/Config status for both the cases.

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Observer tamiro
Observer
1,844 Views
Registered: ‎09-11-2017

Re: Why does re-configuration through ICAPE2 iprog takes longer than regular configuration

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Hi,

I suspect that maybe the flash extended address register is not updated with the WBSTART address.

This will explain why if I read from 0x0 before resetting the re-configuration process works well.

But if I read from a high address (for example 0x6FF0000) The FPGA does not reconfigure.

I an using Microns NQ00AA11G which is a 1Gbit flash that is stacked of 4 256Mb dies and the address wraps around the die ( not the entire flash).

Does that make sense?

If so how can the WBSTART address update the full flash address?

Thank you.

 

 

 

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Xilinx Employee
Xilinx Employee
2,618 Views
Registered: ‎01-10-2012

Re: Why does re-configuration through ICAPE2 iprog takes longer than regular configuration

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Hi @tamiro

 

https://www.xilinx.com/support/answers/53055.html

 

Yes. if that is the case it makes sense for the behavior you are seeing. Hence we don't support multi die Flash of such type.

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