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Newbie vivdxd
Newbie
3,988 Views
Registered: ‎09-22-2011

Alternative to VHDL array of string? - loading memory initialization file

It seems XST does not support VHDL 2008 yet?  I am trying to pass memory initialization file name as a generic, and use generate statement to instantiate the a large number of memory modules in my design.  Each RAM block has a unique initialization file.

 

Naturally if I could define the initialization file names in an array, I can loop through the array in a generate statement.  It seems VHDL 2008 allows this.  Otherwise I need to explicitly type out all the RAM instantiation?

 

Could someone give me some tips on alternatives?  I am sure I am not the first one running into this problem.

 

Thanks!

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Teacher rcingham
Teacher
3,980 Views
Registered: ‎09-09-2010

Re: Alternative to VHDL array of string? - loading memory initialization file

"It seems XST does not support VHDL 2008 yet?"
Correct.

If this is a 'compile-time' operation (as I think it must be meant to be), you probably could read the list of memory initialization files from a 'master' file.

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"If it don't work in simulation, it won't work on the board."
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