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1,490 Views
Registered: ‎03-03-2017

Block design giving BD-41-1287 errors

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Hi, I am working on a Vivado 2017.4 Kintex 7 project on Windows 10, and after removing some ports from a block design and reconnecting the pins to other nodes within the block design instead of the ports which I removed, I am now getting a bunch of BD-41-1287 Associated interface by name XXX not found for clock port YYY critical warnings which appear to be coming from the srcs/sources_1/bd/bdname/synth/bdname.v file setting up X_INTERFACE_INFO (see images below).

   Does anybody have a solution for this to get rid of the critical warnings?

 

Vivado warnings:

bd_error_1.png

 

bd_error_2.png

 

bd_error_3.png

 

Thanks.

Tim

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1 Solution

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Xilinx Employee
Xilinx Employee
1,896 Views
Registered: ‎07-22-2008

Re: Block design giving BD-41-1287 errors

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I've seen this before when an interface port was deleted but had previously been added as a property for another object in the BD.

Two ideas that could help

1) Select clk_200 (and the other ports reported) then go to the properties window and find the config -> ASSOCIATED_BUSIF property and delete the value, VDMA_IN_S_AXIS_S2MM and DP_RX_OUT_m_axis_video_stream1.  Note, that there could be multiple associations and you should only delete the ones that are no longer valid and giving errors.  Repeat for the other ports and values giving errors

 

2) Run  "write_bd_tcl" to create a .tcl representation of the Block Design.  Then open the Tcl file in a text editor and use the find function to find the properties that should have been removed.  There will be a line something like the following

"CONFIG.ASSOCIATED_BUSIF {my_IP_S_AXI:clk_200:VDMA_IN_S_AXIS_S2MM:DP_RX_OUT_m_axis_video_stream1} \"

You have two options at this point.  You can either go back into the BD and remove the property value now that you've found where the association is.  ... or you could delete the errant values; save the .tcl file and source it to regenerate the BD.  (The original BD should first be backed up and removed from the project).

 

 

2 Replies
Xilinx Employee
Xilinx Employee
1,897 Views
Registered: ‎07-22-2008

Re: Block design giving BD-41-1287 errors

Jump to solution

I've seen this before when an interface port was deleted but had previously been added as a property for another object in the BD.

Two ideas that could help

1) Select clk_200 (and the other ports reported) then go to the properties window and find the config -> ASSOCIATED_BUSIF property and delete the value, VDMA_IN_S_AXIS_S2MM and DP_RX_OUT_m_axis_video_stream1.  Note, that there could be multiple associations and you should only delete the ones that are no longer valid and giving errors.  Repeat for the other ports and values giving errors

 

2) Run  "write_bd_tcl" to create a .tcl representation of the Block Design.  Then open the Tcl file in a text editor and use the find function to find the properties that should have been removed.  There will be a line something like the following

"CONFIG.ASSOCIATED_BUSIF {my_IP_S_AXI:clk_200:VDMA_IN_S_AXIS_S2MM:DP_RX_OUT_m_axis_video_stream1} \"

You have two options at this point.  You can either go back into the BD and remove the property value now that you've found where the association is.  ... or you could delete the errant values; save the .tcl file and source it to regenerate the BD.  (The original BD should first be backed up and removed from the project).

 

 

1,425 Views
Registered: ‎03-03-2017

Re: Block design giving BD-41-1287 errors

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@howardp,

   Thanks so much for the information.

   I was able to go to the block design, select the clock, and edit the property like you mentioned and I stopped getting the warnings.

 

bd_error_4.png

 

Tim

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