08-27-2009 08:07 AM
Configuring the polarity of the enable pins of the RAM blocks using Coregen??
I read the U190 manual where it is mentioned that the polarity can be changed but doesnt have info abt how to change.
Anyone has done this earlier?
If so please let me know how to do
09-04-2009 12:54 AM
Which version of coregen You are using?
I am using ISE10.04 with Ip update3.
Using block memory generator, you can generate RAM blocks . But the Enable pin is active high. To change the polarity ,there is no option available in the GUI . If i remeber correctly earlier version of xilinx coregen used to have those options.
Anyway , Its simple while instantiationg the module put an inverter if required to change the polarity.
hope it helps.
09-07-2009 01:31 AM
I am using 11.2i...I have already implemented using inverters...but just wondering if we can avoid using external inverters.
Also have you tried automating the synthesis ...using the scripts given in XST tutorial..
I tried but ...it gives me error message 426..
Please let me know if you tried this and faced similar problem.