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Scholar
Scholar
467 Views
Registered: ‎12-07-2018

Custom AXI IP Tutorial

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Hello, I wanted to ask a quick question to the forum members. I am still a newbie with Vivado and I would like to learn how to take my custom verilog and add a AXI interface so that I can interface with a Microblaze or an ARM core on the Processor Side of an Ultrascale+ MPSoc. I have found some youtube clips and some things in the forum to help me learn how things work. I wanted to ask the community if they have any favorite tutorials or video they have found that could also help in learning how to add AXI to custom verilog.

Thank you,

Joe

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Xilinx Employee
Xilinx Employee
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Registered: ‎08-13-2007

Officially, there's resources like these:

https://www.xilinx.com/support/documentation/sw_manuals/xilinx2019_2/ug1119-vivado-creating-packaging-ip-tutorial.pdf

https://www.xilinx.com/support/documentation/sw_manuals/xilinx2019_2/ug1118-vivado-creating-packaging-custom-ip.pdf

 

but there's a lot of great AXI (and Verilog) information at zipcpu, like:

http://zipcpu.com/blog/2020/03/08/easyaxil.html

and many more that are useful there if you look around.

 

I've also run across this but haven't gone through it yet:

https://ems.eit.uni-kl.de/en/courses/xilinx-zynq/

 

Cheers,

bt

== edit. fixed second link

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Scholar
Scholar
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Registered: ‎08-07-2014

@joe306,

I can recommend you to read Dan's blog. You can use Xilinx cores, but expect them to be buggy.

https://zipcpu.com/formal/2019/04/16/axi-mistakes.html

 

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Highlighted
Xilinx Employee
Xilinx Employee
454 Views
Registered: ‎08-13-2007

Officially, there's resources like these:

https://www.xilinx.com/support/documentation/sw_manuals/xilinx2019_2/ug1119-vivado-creating-packaging-ip-tutorial.pdf

https://www.xilinx.com/support/documentation/sw_manuals/xilinx2019_2/ug1118-vivado-creating-packaging-custom-ip.pdf

 

but there's a lot of great AXI (and Verilog) information at zipcpu, like:

http://zipcpu.com/blog/2020/03/08/easyaxil.html

and many more that are useful there if you look around.

 

I've also run across this but haven't gone through it yet:

https://ems.eit.uni-kl.de/en/courses/xilinx-zynq/

 

Cheers,

bt

== edit. fixed second link

View solution in original post

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Scholar
Scholar
410 Views
Registered: ‎12-07-2018

Hello, thank you very much for responding to my message and include a reference.  Joe

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Scholar
Scholar
406 Views
Registered: ‎12-07-2018

Thank you very much. This is very helpful. 

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Scholar
Scholar
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Registered: ‎05-21-2015

@joe306,

Glad I could help out!

One note to add, though: if you like my blog, feel free to become a patron of it.

Dan