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Contributor
Contributor
10,672 Views
Registered: ‎06-24-2008

Emacs for hdl design

I noticed some here use emacs as their text editor.  I know it is powerful and can often be used as a complete development environment.  Are there any here who use emacs and command line tools as an alternative to ISE completely?  ISE keeps crashing and has other various bugs that get pretty annoying. 

 

If you do use emacs or something other than ISE could you describe your work flow so that others could benefit?  

 

Thanks!

 

bb

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5 Replies
Historian
Historian
10,666 Views
Registered: ‎02-25-2008

Re: Emacs for hdl design


bborko wrote:

I noticed some here use emacs as their text editor.  I know it is powerful and can often be used as a complete development environment.  Are there any here who use emacs and command line tools as an alternative to ISE completely?  ISE keeps crashing and has other various bugs that get pretty annoying. 

 

If you do use emacs or something other than ISE could you describe your work flow so that others could benefit?  

 

Thanks!

 

bb


I use emacs as my default text editor for everything. If you are using it for HDL, you absolutely need the latest vhdl-mode, available here. Truly useful software. Just type

 

pr<tab> 

 

and then it opens up a template for a process, and if you've configured it, it will fill in your clock name, whether it's got a sync or async reset, whether you want rising_edge() or not, and it will ask for a label, and all good. 

 

Tab completion rules. It'll tab-complete lots of other constructs, as well as signal and variable names.

 

It also automatically indents per your desired rules, and all it takes to prettify the buffer is C-x C-b.

 

Create a new file, type C-c C-t C-h and voila -- new header with all of the useful information you'd like to see.

 

Put your cursor in the middle of a port list, select  C-c C-p C-w (VHDL|Port|Copy) and it copies the port list. Then put the cursor in another file or wherever and choose C-c C-p C-i and it creates the instance. Create a new file for a testbench, and in it type  C-c C-p C-t and it creates a skeleton test bench, with DUT instance and signal declarations, with whatever you like to call your testbench architecture.

 

Other editors try to do all of this, and fail.

 

As for running the ISE tools from the command-line, makefiles and xflow are your friends.

----------------------------Yes, I do this for a living.
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Contributor
Contributor
10,636 Views
Registered: ‎06-24-2008

Re: Emacs for hdl design

Thats great! Just what I was hoping.  I have been using the vhdl-mode which is really nice for formatting vhdl files for readability.  Xflow looks like it is exactly what I need.  After looking through some of the documentation it looks like xflow can accomplish through the processes window in ISE. 

 

bassman, you said that you  also use makefiles.  Do you use them to call vcom to and then xflow after that?  It seems like the makefile would only be a couple of lines.   Do you write it or have it generated through emacs?  Another question that comes to mind is when crafting make files directory structure is important.  Do you have separate directories for say src/ build/ bin/ tmp/ or others like that and how would you organize your projects? I never liked how ise just dumps everything into your root project directory.  Thanks for the help

 

bb

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Historian
Historian
10,631 Views
Registered: ‎02-25-2008

Re: Emacs for hdl design


bborko wrote:

Thats great! Just what I was hoping.  I have been using the vhdl-mode which is really nice for formatting vhdl files for readability.  Xflow looks like it is exactly what I need.  After looking through some of the documentation it looks like xflow can accomplish through the processes window in ISE. 

 

bassman, you said that you  also use makefiles.  Do you use them to call vcom to and then xflow after that?  It seems like the makefile would only be a couple of lines.   Do you write it or have it generated through emacs?  Another question that comes to mind is when crafting make files directory structure is important.  Do you have separate directories for say src/ build/ bin/ tmp/ or others like that and how would you organize your projects? I never liked how ise just dumps everything into your root project directory.  Thanks for the help

 

bb


vcom is ModelSim, and as such is separate from ISE. I use the ModelSim vmake command-line function to generate a Makefile which updates the simulation.

 

The easiest thing to do for the Xilinx fitter stuff is to run the tools once using ISE, then capture the command line calls in a script, and execute that script to rebuild.

 

Yes, Xilinx' default of dumping everything into the project directory is stupider than a speed bump. My projects are always organized into src (synthesizable HDL), fitter (UCF, ISE, stuff needed to run the place and route), and testbench (should be obvious) directories. Note that when you add sources to your ISE project you can disable the STUPID option of copying the sources to the project directory, so the project will reference the src location.

----------------------------Yes, I do this for a living.
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Visitor andersoe
Visitor
8,371 Views
Registered: ‎08-02-2010

Re: Emacs for hdl design

I mostly use emacs rather than Project Navigator's built-in editor.  I'm not going to try too hard to sell it:  Emacs has a bit of a learning curve, but it has an almost infinite list of powerful features and options.   Either you like it or you don't.

 

I do most of my coding in Verilog, and use the excellent verilog-modeThere's a well-regarded vhdl-mode as well, but I can't comment on it personally.  Both modes are included by default in the standard emacs distribution. 

 

I wrote my own UCF mode; it does syntax highlighting for most of the constructs I use, but it's not complete.  In fact, I haven't been able to find a single complete specification of the UCF syntax -- it's spread throughout the Constraints Guide,  the Timing Closure User Guide, and device data sheets.  I invite improvements to this mode!

 

I use SCons to automate project compilation (in addition to working interactively in Project Navigator).  This is especially useful for (a) automated testing and configuration management, and (b) ensuring that the necessary rebuilding steps (but only the necessary steps) happen when I change part of a project.  This comes in particularly handy when collaborating with multiple engineers using version control.  My SCons build scripts are shared here, and again improvements are welcome!

 

Hope some of this helps,

Eric

Xilinx Employee
Xilinx Employee
8,342 Views
Registered: ‎11-28-2007

Re: Emacs for hdl design

FWIW, I also created Emacs UCF mode and vivado-mode for editing ucf and vivado .tcl files.

 

 

 


@andersoe wrote:

I mostly use emacs rather than Project Navigator's built-in editor.  I'm not going to try too hard to sell it:  Emacs has a bit of a learning curve, but it has an almost infinite list of powerful features and options.   Either you like it or you don't.

 

I do most of my coding in Verilog, and use the excellent verilog-modeThere's a well-regarded vhdl-mode as well, but I can't comment on it personally.  Both modes are included by default in the standard emacs distribution. 

 

I wrote my own UCF mode; it does syntax highlighting for most of the constructs I use, but it's not complete.  In fact, I haven't been able to find a single complete specification of the UCF syntax -- it's spread throughout the Constraints Guide,  the Timing Closure User Guide, and device data sheets.  I invite improvements to this mode!

 

I use SCons to automate project compilation (in addition to working interactively in Project Navigator).  This is especially useful for (a) automated testing and configuration management, and (b) ensuring that the necessary rebuilding steps (but only the necessary steps) happen when I change part of a project.  This comes in particularly handy when collaborating with multiple engineers using version control.  My SCons build scripts are shared here, and again improvements are welcome!

 

Hope some of this helps,

Eric




Cheers,
Jim
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