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cone83
Adventurer
Adventurer
1,484 Views
Registered: ‎04-23-2014

Empty can_apply_rule error since update to 2019.2

I've updated my project to Vivado 2019.2. Since then I frequently get the following error when editing the BD:

 

ERROR: [Ip 78-125] Tcl Error in evaluating proc can_apply_rule : 

One way to trigger this is to delete any connection in the BD. Since the error message is empty, I have no idea how to localize this problem. Any suggestions?

 

Screenshot from 2019-11-13 10-41-27.png

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7 Replies
timo-ge
Explorer
Explorer
1,349 Views
Registered: ‎11-12-2007

Same issue here, running in Ubuntu 18.04.

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cone83
Adventurer
Adventurer
1,342 Views
Registered: ‎04-23-2014

I'm also running Ubuntu 18.04.

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pawelzz
Contributor
Contributor
1,180 Views
Registered: ‎05-16-2018

The same problem on CentOS 7.7.1908

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adamjtolman
Observer
Observer
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Registered: ‎01-28-2019

This happens in 2019.1.3, as well. Not sure when it started happening, as I've been running 2019.1.3 for a while and hadn't seen this. I did only notice it after installing 2019.2, running into no-go bug with the 10G/25G Ethernet Subsystem IP, and falling back to 2019.1.3.

As stated above, can easily happen when deleting items via the GUI. Doing the same exact commands via the Tcl console has not given me the error in my experience.

In addition, I'm now building a project and block design via scripts, so no deletions and no GUI interfacing, and I still get a few of these. In my vivado.log I see a triplet of print outputs corresponding to the error:

[Tue Mar 31 14:10:24 2020] Launched synth_1...
Run output will be captured here: /build/work/life_test/vivado/fpga_life_test.runs/synth_1/runme.log
launch_runs: Time (s): cpu = 00:01:47 ; elapsed = 00:01:57 . Memory (MB): peak = 10383.215 ; gain = 0.000 ; free physical = 15980 ; free virtual = 23189
zynquplus
WARNING: [Boardtcl 53-1] No current board_part set.
ERROR: [Ip 78-125] Tcl Error in evaluating proc can_apply_rule :
zynquplus
WARNING: [Boardtcl 53-1] No current board_part set.
ERROR: [Ip 78-125] Tcl Error in evaluating proc can_apply_rule :
zynquplus
WARNING: [Boardtcl 53-1] No current board_part set.
ERROR: [Ip 78-125] Tcl Error in evaluating proc can_apply_rule :
zynquplus
WARNING: [Boardtcl 53-1] No current board_part set.
ERROR: [Ip 78-125] Tcl Error in evaluating proc can_apply_rule :
WARNING: [IP_Flow 19-3899] Cannot get the environment domain name variable for the component vendor name. Setting the vendor name to 'user.org'.
current_board_part
WARNING: [Boardtcl 53-1] No current board_part set.

Don't know if all of those Boardtcl 53-1 warnings are related. Also, not entirely sure why they keep popping up as the design is targeted to a part, not a board. I figure there must be some asinine thing in my project build script that has the project configured in a weird way.

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cone83
Adventurer
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1,103 Views
Registered: ‎04-23-2014

I also have an instance of the 10G/25G Ethernet Subsystem IP in my block design. So the problem could be related to this IP.

I used the reference design for this IP with the older Vivado version that it required and then updated the project.

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fircrestsk8
Observer
Observer
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Registered: ‎03-14-2016

I also see this in 2019.1 (no updates applied). Has not directly been linked to any problems I'm experiencing, but is misleading and can hide real errors because they flood in with almost any type of modification used at the GUI. I'm hoping this is not the new normal for Vivado. Any word from Xilinx on this?

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mansuramin
Adventurer
Adventurer
430 Views
Registered: ‎12-04-2019

I see the same issue using 2019.2.1 

very annoying. 

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