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Visitor
Visitor
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Registered: ‎01-16-2020

How use external clock custom Spartan 7 pcb

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On my pcb I have 12MHz clock source connected to pin H3 of Spartan 7 FPGA. 

I am trying to use this clock in simple testing app to blink some LEDs driven by other pins, I already tested in static mode (no clock). 

So far, in constrains file I defined the following:

set_property PACKAGE_PIN H3 [get_ports clock_12M]
set_property IOSTANDARD LVCMOS33 [get_ports clock_12M]
create_clock -add -name sys_clk -period 83.33 -waveform {0 5} [get_ports clock_12M]

* is this correct?

Now, I am not sure how to use this clock_12M in the design source file (VHDL), here is what I have there:

entity ios is
  Port (
    led_1 : out STD_LOGIC := '0';
    led_2 : out STD_LOGIC := '1';
    led_3 : out STD_LOGIC := '0';
    led_4 : out STD_LOGIC := '1';
    led_5 : out STD_LOGIC := '0';
    led_6 : out STD_LOGIC := '1';
    led_7 : out STD_LOGIC := '0';
    led_8 : out STD_LOGIC := '1';
    sw_1 : in STD_LOGIC;
    sw_2 : in STD_LOGIC;
    sw_3 : in STD_LOGIC;
    sw_4 : in STD_LOGIC
  );

I also created constants and variables to divide the clock to lower frequencies to blink LED's:

-- Constants to create the frequencies needed:
  -- Formula is: (12 MHz / 100 Hz * 50% duty cycle)
  -- So for 100 Hz: 12,000,000 / 100 * 0.5 = 125,000
  constant c_CNT_5HZ   : natural := 1200000;
  constant c_CNT_3HZ   : natural := 2000000;
  constant c_CNT_2HZ   : natural := 3000000;
  constant c_CNT_1HZ   : natural := 6000000;
 
  -- Counters:
  signal r_CNT_5HZ : natural range 0 to c_CNT_5HZ;
  signal r_CNT_3HZ : natural range 0 to c_CNT_3HZ;
  signal r_CNT_2HZ : natural range 0 to c_CNT_2HZ;
  signal r_CNT_1HZ : natural range 0 to c_CNT_1HZ;
 
   -- These signals will toggle at the frequencies needed:
  signal r_TOGGLE_5HZ : std_logic := '0';
  signal r_TOGGLE_3HZ : std_logic := '0';
  signal r_TOGGLE_2HZ : std_logic := '0';
  signal r_TOGGLE_1HZ : std_logic := '0';

But here, I am not sure how should I use defined in constraints "clock_12M" to run above counters defined above, can you help please?

Thank you.

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Visitor
Visitor
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Registered: ‎01-16-2020

Re: How use external clock custom Spartan 7 pcb

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Hi Mark,

and thanks for productive input. Aside from what I already implemented and listed in my initial post plus what you contributed, I was able to complete the task.

However, with single ended clock source I have routed to pin H3 of my FPGA (H3 is N-side of dedicated differential clock input), there was one more property needed to be added to .xdc file make it all work with Spartan 7 device I am using, and it was:

set_property CLOCK_DEDICATED_ROUTE FALSE [get_nets {clock_12M_IBUF}]

With this all works as intended. Thanks a lot for help!

View solution in original post

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Teacher
Teacher
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Registered: ‎07-09-2009

Re: How use external clock custom Spartan 7 pcb

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The basis of all clock constraints, is define the source, and the tools propagate the timing through for you.

Your signals , which are divided off the clock by your code, could be called , red , green, blue or what ever.
Although you have called them clocks, they are just signals.

Now
without your code as an attatchmetn, Im guessing here.

But I'm betting your driving the clock into slower square waves, and applying these square waves to the clock inputs of down stream registers.

If so, this is very wrong way of doing things

What you should do, is drive all your registers off the same main clock,
and the generate one clock wide enable pulses off the main clock

Then all your registers are synchronous, and the timing will work great.


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Newbie
Newbie
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Registered: ‎01-17-2020

Re: How use external clock custom Spartan 7 pcb

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The guy provided the code and he is actually on the right path to get it working. His intention is to drive it from one clock he simply asks how to tie the external - already defined clock to his regs defined in the code.

Sorry, but what you are saying don't make much sense.
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Teacher
Teacher
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Registered: ‎07-09-2009

Re: How use external clock custom Spartan 7 pcb

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@techguy, I'm sorry you feel that way about my comments,

Which part of what I say does not make sense to you, I will try to expand,

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Newbie
Newbie
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Registered: ‎01-17-2020

Re: How use external clock custom Spartan 7 pcb

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The whole part. It's obvious you don't understand initial inquiry either because you don't understand the message or entire subject in general.

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Teacher
Teacher
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Registered: ‎07-09-2009

Re: How use external clock custom Spartan 7 pcb

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@techguy

Thank you for your views,

may be @surowinski  could comment and I'd be happy to help,

 
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Registered: ‎01-22-2015

Re: How use external clock custom Spartan 7 pcb

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@surowinski 

I can see that you are just starting your VHDL adventure.  Here are some things to help you along.

XDC Constraints File:
If your 12MHz clock is a square-wave (ie. 50% duty cycle) then you can simplify the create_clock constraint to be:

create_clock -period 83.33 [get_ports clock_12M]

Also, you should add “set_property PACKAGE_PIN” and “set_property IOSTANDARD” constraints for led_1 -thru- led_8 and for sw_1 -thru- sw_4.

VHDL Entity:
I assume you will have only one component in your VHDL project and it will be called “ios”.  Hence, “ios” will also be the top-level component for your project.  Into the entity you have shown, you need to add your clock as follows.

entity ios is
   port (
            clock_12M : in STD_LOGIC := '0';
            led_1 : out STD_LOGIC := '0';
            …....

 

VHDL Architecture:
In the “ios” component, you will write the architecture block.  Inside the architecture block you will write VHDL clocked processes to divide-down the clock.  The VHDL below is an example.

library IEEE;
use IEEE.STD_LOGIC_1164.ALL;
use IEEE.NUMERIC_STD.ALL;  

entity ios is
  port (
            …
           );
end ios:

architecture TRY1 of ios is
    --
    --put declarations for constants and signals here…
    --
begin
    --this VHDL clocked process divides down the 12MHz clock to get a 1Hz toggle signal called r_TOGGLE_1HZ
    P1: process(clock_12M)                                                     
        begin  
            if rising_edge(clock_12M) then
                if(r_CNT_1HZ = c_CNT_1HZ) then
		    r_TOGGLE_1HZ <= not(r_TOGGLE_1HZ);
		    r_CNT_1HZ <= 1;
                else
		    r_CNT_1HZ <= r_CNT_1HZ + 1;
                end if;
            end if;           
    end process P1;

    led_1 <= r_TOGGLE_1HZ;   --this sends the 1Hz toggle to output, led_1

end TRY1;

Good luck,
Mark

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Visitor
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Registered: ‎01-16-2020

Re: How use external clock custom Spartan 7 pcb

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Hi Mark,

and thanks for productive input. Aside from what I already implemented and listed in my initial post plus what you contributed, I was able to complete the task.

However, with single ended clock source I have routed to pin H3 of my FPGA (H3 is N-side of dedicated differential clock input), there was one more property needed to be added to .xdc file make it all work with Spartan 7 device I am using, and it was:

set_property CLOCK_DEDICATED_ROUTE FALSE [get_nets {clock_12M_IBUF}]

With this all works as intended. Thanks a lot for help!

View solution in original post

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