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Scholar beandigital
Scholar
7,004 Views
Registered: ‎04-27-2010

INIT in memory

I think I already know the answer to this but I will ask it anyway. Is it possible for the INIT contents of a distributed mem to be reset during normal operation. I have a small memory of 19 values that I need to reset to some init values every so often. Having to write those into the mem would take too long so I would like to have them all set in one clk. 

 

Thanks

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11 Replies
Xilinx Employee
Xilinx Employee
6,990 Views
Registered: ‎08-01-2008

Re: INIT in memory

You can initialize the distributed memory content with asserting reset signal
Thanks and Regards
Balkrishan
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Scholar beandigital
Scholar
6,984 Views
Registered: ‎04-27-2010

Re: INIT in memory

Thanks for your help.

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Xilinx Employee
Xilinx Employee
6,977 Views
Registered: ‎08-01-2008

Re: INIT in memory

For your information
This true only for distributed memory. For BRAM you need to reconfigure the FPGA or rewrite the locations

Basically BRAM can't be reset with signal reset pulse
Thanks and Regards
Balkrishan
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Scholar beandigital
Scholar
6,971 Views
Registered: ‎04-27-2010

Re: INIT in memory

I have just tried a simulation to verify the distributed memory INIT contents. I can read the values at startup. But if I then write 0 into the locations, read them back out, then reset the memory, I cant read the INIT values any longer.
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Xilinx Employee
Xilinx Employee
6,969 Views
Registered: ‎08-01-2008

Re: INIT in memory

This is expected behavior Right!
Thanks and Regards
Balkrishan
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Scholar beandigital
Scholar
6,968 Views
Registered: ‎04-27-2010

Re: INIT in memory

No. I want to be able to read the INIT values back from the mem when I do a reset. This is not happening.
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Scholar beandigital
Scholar
6,961 Views
Registered: ‎04-27-2010

Re: INIT in memory

I am saying that after a reset the RAM contents are the values that I just wrote. So if I write all 1's into the mem I still get that after a reset. Not the INIT contents.
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Scholar beandigital
Scholar
6,948 Views
Registered: ‎04-27-2010

Re: INIT in memory

I am thinking that the distributed RAM cannot be init during normal operation. If I look at the product guide the reset only goes to the output registers.

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Xilinx Employee
Xilinx Employee
6,946 Views
Registered: ‎08-01-2008

Re: INIT in memory

yes reset only goes to output registers part of slice
Thanks and Regards
Balkrishan
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Scholar beandigital
Scholar
5,110 Views
Registered: ‎04-27-2010

Re: INIT in memory

So why did you tell me that it would init the memory content?
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Xilinx Employee
Xilinx Employee
5,108 Views
Registered: ‎08-01-2008

Re: INIT in memory

Memory content initialize during FPGA configuration and reset with system reset. During normal operation you can only reset the LUT register.
Thanks and Regards
Balkrishan
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