UPGRADE YOUR BROWSER

We have detected your current browser version is not the latest one. Xilinx.com uses the latest web technologies to bring you the best online experience possible. Please upgrade to a Xilinx.com supported browser:Chrome, Firefox, Internet Explorer 11, Safari. Thank you!

cancel
Showing results for 
Search instead for 
Did you mean: 
Participant jpnaude
Participant
3,160 Views
Registered: ‎03-18-2009

Is there a way to create an ISE project with the VHDL sources specified in the .prj file?

Hi

 

In our design we're at the stage where we need to experiment with Partitions to reduce implementation times. Our design environment is HDL Author which produces as output everything needed for XST to produce a netlist, that is:

 

- .prj file

- .xst file

- .bat file that runs synthesis with the correct command line arguments

 

However since we want to use partitions it seems like the only way to do that is through ISE by selecting the HDL files and assigning partitions to them (if there is a way to do this through a XCF please let me know, but according to XAPP918 it is not possible, or at least it looks like it). The project is quite big with loads of VHDL files all specified through the .prj file.

 

Is there a way to create an ISE project with the VHDL sources specified in the .prj file? Maybe using the tcl interface? I'm going to experiment with this now, but it there is an easier way please let me know.

 

Thanks in advance,

Jaco