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bruce_karaffa
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Registered: ‎06-21-2017

Processor System Reset

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I have a block design with a Processor System Reset.  The documentation (PG164) states that I can set the polarity of ext_reset_in to either active high or active low.  I cannot change it from active high to active low.  I get the critical warning   "CRITICAL WARNING: [BD 41-737] Cannot set the parameter C_EXT_RESET_HIGH on /proc_sys_reset_1. It is read-only."  If I add a new Processor System Reset, I still cannot make the ext_reset_in signal active low.  What is the reason for this?

Since I cannot change the polarity of the reset signal, I have simply deleted the reset port and am using the pl_resetn signal from the PS of the Zynq.  This works OK, but the Designer Assistance keeps coming up and wants to add an external reset port.  I suppose I could just let it and use a pulldown on an unused pin for the ext_reset_in signal, but I would much prefer that the tool would work the way the documetation says it should.

I'm running Vivado 2017.2 on Windows 7.

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kenryan2
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Registered: ‎04-22-2015

Set the polarity at the driver of the reset net. For example, if your reset is an input port to the BD go to "External Port Properties" and in the drop-down box "Polarity" select "Active Low".  Also be sure to select the associated clock input under "Clock Port" so the DRC validations know when it should be resynchronizing.

If it's driven from a custom IP then be sure the IP port is inferred as a reset type, and add the polarity attribute there.

ken

 

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kenryan2
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Registered: ‎04-22-2015

Set the polarity at the driver of the reset net. For example, if your reset is an input port to the BD go to "External Port Properties" and in the drop-down box "Polarity" select "Active Low".  Also be sure to select the associated clock input under "Clock Port" so the DRC validations know when it should be resynchronizing.

If it's driven from a custom IP then be sure the IP port is inferred as a reset type, and add the polarity attribute there.

ken

 

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bruce_karaffa
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Registered: ‎06-21-2017

Accepted this as a solution because it's pretty close to what I had to do to fix the problem.  I deleted the Processor System Reset, then added a new one.  It can up with the external reset active low.  I then just clicked on the port and made it external.  I still find it very annoying that Vivado refuses to let the designer connect things the way he (or she) intends.  If it is physically possible and won't harm the device, let the designer do it.  Throw a warning if you want.  After a couple hundred warnings, they lose some urgency anyway.

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