08-29-2013 04:22 PM
Hello, I have some very old schematics (.sch files) circa 1999 that Xilinx won't open. They are in some sort of binary format that Xilinx doesn't recognize. Does anyone know of a way to open these files, or at least view their contents in some way? I've attached one of the schematics for reference.
Thanks for helping,
08-29-2013 05:12 PM
Perhaps there's a text-format netlist (e.g. EDIF) laying around which is generated from this schematic.
-- Bob Elkind
08-29-2013 08:30 PM
Which version of ISE have you used while creating this schematic file?
Now in which version you want to use this?
08-30-2013 02:47 PM - edited 08-30-2013 02:54 PM
The file you posted was created in Foundation 4.1i or earlier using the Aldec front-end. Here's a clip from the schematic I got using Foundation 4.1i
Note that symbols in this sheet are missing, probably because they were in the project library rather than Xilinx built-in libraries.
You might be able to read these files using the latest version of Aldec tools.
If you can zip up the entire project, which consists of a .pdf file (which is not an Adobe portable document, but rather an Aldec project file) and a folder of the same name with a number of sub-folders, then it wouldn't be very hard for me to create a .pdf of your shematics including any hierarchical schematic macros. Unfortunately, other than using Aldec's tools there is no way to read these. Xilinx and Aldec parted ways many years ago and Xilinx is no longer authorized to provide licenses to the Aldec front end of their old Foundation tools.
08-30-2013 04:29 PM
Thanks for the offer. By the looks of it, and the other design information I have, those are the VHDL blocks. I'm hesitant to give you any of the VHDL code, but I've attached the rest of the schematics, and I would be very appreciative if you could convert those to PDFs. I can probably fill in the missing info with the VHDL files I have, and I plan to convert the whole design to VHDL.
08-30-2013 04:42 PM
The VHDL code is not necessary but you'd need to at least include the local symbol library so you could see the ports on those VHDL macros. Otherwise you'd be just guessing at the connections. By the way, I don't see an attachment on your post. If you'd rather do it off-line send me a PM.
08-30-2013 04:44 PM
08-30-2013 07:32 PM - edited 08-30-2013 07:38 PM
Here's the best I could do without your symbols. Most of the blocks are called "temp" because the symbol is in some other library. You'll have to guess at the port names, but at least the name of the symbol was displayed in the original schematics so outside the box is the name of the original symbol or macro.
I looked at an old schematic project and found that under the project folder was a lib folder. All of the files in that folder start with the project name and have different extensions like BLK, DIR, FIG, FLG... I believe you would need all of them to use the library elements, but possibly only some to view the schematic symbols with port names. If you get a chance to look through your old files for the library, post back here.
09-30-2013 06:20 AM
Here you go...
I noticed that there are some library symbols that didn't show up - mostly BUFGS. I used Spartan 2 as the project type, so it's possible that this library element refers to some other FPGA. Also note that even for macros where you gave me the schematics, the symbol is not printed with pin names. I think the connections to symbols are positional in this schematic editor, so it can't really tell me that information. You would need to find the original lib directory from this project to get a usable schematic.
12-21-2013 01:32 AM
i too have some xilinx schematics of the same type...i am unable to open the .sch and .bsc files on my ise 14.2 design suite.i am new to xilinx and was recently introduced to it for a project.please help me regarding the schematics..i have attached the zip file.