11-01-2018 11:16 PM
opening project in 2017.4 (did not migrate or anything. Always worked with 2017.4). Running simulation, all is fine and working well. After simulation is finished I want to return to BD. I click on Open Block Design and Vivado crashes without any warning. In the folder sim there's a file named: hs_err_pid8332.log
Which has the error:
# An unexpected error has occurred (EXCEPTION_ACCESS_VIOLATION)
no stack trace available, please use hs_err_<pid>.dmp instead.
This happens every time.
11-01-2018 11:50 PM
Try closing the simulation window and then open the block design from default vivado layout.
Anyways tool should never crash. If you can share the archive project, I can test it on my end in latest 2018.2 build.
11-01-2018 11:59 PM
Ok, thanks. I want to go to BD, fix something and then re-run simulation... if I close the simulation, then re-run from scratch will take a long time...
11-02-2018 12:11 AM
Can you try in 2018.2? Is this crash specific to one vivado project? Try checking on Xilinx example design (base zynq)
11-02-2018 12:28 AM
Ok, will try and get back.
since I'm kinda new in Vivado, what is the correct way to run simulation AFTER changing something in the BD? I mean, I can "generate output products", etc.
Obviously I need to do some form of synth in order to take the changes into account.
11-02-2018 12:33 AM
Check out my posts in below link which has links of user guides, tutorial which will help new beginners with Vivado.
11-02-2018 12:39 AM
Since it is a simple question, can you help and give the straight answer instead of me going over hundreds of pages in order to find the answer?
11-02-2018 01:47 AM
Yes, after making the BD changes, you will need to regenerate the output products