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Explorer
Explorer
7,193 Views
Registered: ‎08-18-2011

Vivado cannot find an input clock with wildcard

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Win7 | SLED11 - Vivado 2014.2

 

I have the following in my XDC:

 

set_property PACKAGE_PIN AC9 [get_ports F0_REFCLK_100M_P]

create_clock -period 10.000 -name 100m_refclk [get_ports F0_REFLCK_100M_*]

I get an implementation critical warning of

 

[Vivado 12-1387] No valid object(s) found for create_clock constraint with option '-objects [get_ports F0_REFLCK_100M_*]'. ["/path/file.xdc":379]

 

Am I using the wildcard wrong? Or is this an indication that this clock is unconnected? [it drives lots in the FPGA and is certainly connected in HDL]

 

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Explorer
Explorer
12,803 Views
Registered: ‎08-18-2011

Re: Vivado cannot find an input clock with wildcard

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Just noticed my typo REFLCK should be REFCLK
1 Reply
Explorer
Explorer
12,804 Views
Registered: ‎08-18-2011

Re: Vivado cannot find an input clock with wildcard

Jump to solution
Just noticed my typo REFLCK should be REFCLK