UPGRADE YOUR BROWSER

We have detected your current browser version is not the latest one. Xilinx.com uses the latest web technologies to bring you the best online experience possible. Please upgrade to a Xilinx.com supported browser:Chrome, Firefox, Internet Explorer 11, Safari. Thank you!

cancel
Showing results for 
Search instead for 
Did you mean: 
Participant deritha-06
Participant
3,417 Views
Registered: ‎04-15-2010

Wire draw problem

As the attachment shows:

 

I failed to draw a line between CE on 3rd cd4rled and CEO on 2nd cd4rled. I've tried many times........:(

 

One more question, I failed to add bus tap too. I don't know why I can't put it on the schematic.

 

Thanks

0 Kudos
1 Reply
Xilinx Employee
Xilinx Employee
3,326 Views
Registered: ‎12-17-2007

Re: Wire draw problem

I cannot reproduce this with just the schematic you uploaded.  Can you also upload the schematic/symbol for the cd4rled ?

-------------------------------------------
this space intentionally left blank
0 Kudos