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Observer gauthamsm
Observer
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Registered: ‎09-07-2016

Xilinx FPGA read Serial Wire Debug (SWD) input

Hello,

I am working on a research project where we are monitoring the execution and data traces of  STM32F4 processor on security monitors running on FPGA Programmable logic.

The trace informartion on the STM32F4 board are read from a Serial Wire Debug (SWD) interface. 

I wanted to know how the SWD trace data can be read on the FPGA programmable logic? Is there an IP for SWD that could be used ?

Thank you for any inputs on this.

 

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