We have detected your current browser version is not the latest one. Xilinx.com uses the latest web technologies to bring you the best online experience possible. Please upgrade to a Xilinx.com supported browser:Chrome, Firefox, Internet Explorer 11, Safari. Thank you!

Showing results for 
Search instead for 
Did you mean: 
Registered: ‎04-15-2009

ip core generator problem

Hello sir,

I have to make 16 point IFFT and FFT through ip core generator.
Here no one has knowledge about ip core.so I am facing more problem in this matter .
Now I have to use IFFT and FFT from ip core generator.so I need step for this.
Previously i had used this ip core for FFT.but after appling force to the input  in modelsim i couldn't got output.so i am feeling that my step for generating ip core and that vhdl file is wrong.
step I had fallowed is:
first create project and than generate ip core for the FFT
generating FFT -ip core(.xco file)
than generate .vhd file (from view hdl functional model)
which is added to this project and simulating it.

fallowing this step I cant able to get output.(when given force to the input)

so plz give me step from generating ip core for FFT  to viewing output on modelsim.

Thanks & Regards,
Swapnil Shah
0 Kudos