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Newbie trcicchi
Newbie
191 Views
Registered: ‎10-12-2009

vivado sythesis reports system ILA IP locked

Hi, I added a system ILA to my block design in Vivado 2016.4 on Windows 10.  The design generates/validates with no issues, but when synthesized (standalone per block design) it reports that the system ILA IP is locked.  Running report_ip_status shows no problems.  Implementation fails, reporting the system ILA as an unresolvable black box.  I also ran this on a linux-based Jenkins server, also vivado 2016.4, and got the same result.

What are my options here, rev the design to a newer version?

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2 Replies
Xilinx Employee
Xilinx Employee
162 Views
Registered: ‎05-14-2008

Re: vivado sythesis reports system ILA IP locked

Can you show us the complete error message?

And a screenshot of the GUI when the error occurred would be helpful.

And can you attatch what the report_ip_status said?

-vivian

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Newbie trcicchi
Newbie
126 Views
Registered: ‎10-12-2009

Re: vivado sythesis reports system ILA IP locked

report_ip_status shows 49 IPs all up to date.  I didn't save the synthesis report but the warning message was that the ILA IP was locked, and to run report_ip_status for help on this issue.

This is implementation message that resulted:

CRITICAL WARNING: [Project 1-486] Could not resolve non-primitive black box cell 'arm_subsystem_bd_adeb' instantiated as 'U_arm_subsystem/arm_subsystem_i/fifo_struct/system_ila_0/U0' [/work/workspace/SB501_Aquila_PL_DDR_Test/arm_subsystem/bd/arm_subsystem/ip/arm_subsystem_system_ila_0_1/synth/arm_subsystem_system_ila_0_1.vhd:633]

That said, I got it to work.

I deleted the ILA from the BD and re-added it and it built without complaint.

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