I request you to help me...
Actaully, I want to pin plan for PS part of XILINX Zynq XCZU21DR-FFVD-2-e.
I am not getting how i will do?
Also I am following the the doc " UG899 (v2017.2) July 26, 2017 " for PL part of such Xilinx. But I am not confident that i am write or wrong.
So i request you, help me friends...