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Observer
Observer
8,237 Views
Registered: ‎02-29-2016

Partial Reconfiguration Controler on KC705

Hi,

I am new to partial reconfiguration (and Vivado) and trying to implement a simple example Using prc_v1_0 on a KC705 (Kintex 7) board using Vivado 2015.3.

 

As mentiond on page 58 of "pg193-partial-reconfiguration-controller.pdf" I am trying to use the BPI flash available on the board.

The example I am trying to implement is exaxtly the one described in "ug947-vivado-partial-reconfiguration-tutorial.pdf". I have aready ran the example successfully. Now I want to store ale the bit streams in the BPI flash and triger partial reconfiguration using PRC and a HW triger signal. I have aready generated the memory images and programmed BPI.

My question is how should I interface the PRC core with the flash? should I use AXI EMC? If yes please help me with the configuration and connections of the AXI EMC.
 
Regards,
Ehsan

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Xilinx Employee
Xilinx Employee
8,201 Views
Registered: ‎06-14-2012

Re: Partial Reconfiguration Controler on KC705

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Observer
Observer
8,186 Views
Registered: ‎02-29-2016

Re: Partial Reconfiguration Controler on KC705

Hi Sikta,

 

Thanks for the reply.

Unfortunately the document you sent is completely irrelevant and has nothing to do with my question.

My question is about PRC interfacing Linear flash on KC705 (Kintex 7).

 

Regards

Ehsan

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Xilinx Employee
Xilinx Employee
8,165 Views
Registered: ‎11-17-2008

Re: Partial Reconfiguration Controler on KC705

Ehsan,

 

We have exactly what you are looking for -- a tutorial design for the PR Controller IP that targets the KC705.  Currently it exists as a training module that our field engineers can use with customers, but at the release of Vivado 2016.1, it will be included as one of two new labs in the PR Tutorial document (UG947).  Send me a private message with your email address and I can share the current version with you directly.

 

thanks,

david.

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