09-20-2020 08:19 PM - edited 09-22-2020 07:36 AM
I'm using Vivado 2019.2 in project mode to implement a PR design targeting ZCU106 board. A variant of the following error pops up when trying to run the placer in one of the child runs complaining about over-utilization of either DSP or BRAM resources in a reconfigurable partition. The reconfigurable partition does have enough DSP/BRAM resources to accommodate the reconfigurable module.
[Place 30-859] Some BRAM area constraints are over utilized.
2 or more BRAM failed to place.
Number of BRAM required by this constraint: 14
Some of the BRAMs are cascaded BRAMs in SYSTOLIC or PIPELINED mode that cannot cross clock region boundaries for timing reasons. This adds additional placement constraints.
[Place 30-365] The following macros could not be placed:
[Place 30-99] Placer failed with error: 'The following macros could not be placed:
I tried running opt_design -propconst -sweep -bufg_opt -shift_register_opt on the main and child runs as suggested here and it does not resolved the issue. AR#64734 (i.e., set_param place.closeImportedSites false) does not fix the problem either. Furthermore, due to version and device differences, I cannot use the tactical patch provided for Vivado 2020.1 in AR#75389.
I have uploaded the optimized netlist DCP for the failing child run here.
I have no clue what is causing the problem. Any ideas how to resolve this issue? Can I somehow skip this placement check in the hope that the reconfigurable modules would be placed correctly?
10-21-2020 04:11 PM
A little background on the behavior that looks to be affecting this error. After the first configuration, BRAM and DSP sites can be blocked for usage in the second configuration. This happens if the routing resources are needed near the horizontal boarder of the RP pblock. To check where these are, the ./hd_visual/blockedbelsoutput.tcl can be used to select and highlight the blocked sites. Here are some suggestions on how to overcome the error.