Tri-state Error in Partial Reconfiguration

[soulefmassoud]

Hi everybody,

When I try to implement the design in PlanAhead 14.7(i'm using virtex-7 xc7vx330t), I get the folloing error:

[MapLib 973] Tri-state buffers are not supported in this architecture. Block instance6/int1/sadmuxE<4>_GND_609_o_sad_13[4]_Select_65_o must be removed from the design.

I don't understand this,please anyone help me.

thanks.

[syedz]

@soulefmassoud,

Check this AR

https://www.xilinx.com/support/answers/39803.html

--Syed

[soulefmassoud]

hi,
Thanks for your reply.
I used this (https://www.xilinx.com/support/answers/39803.html) but I don't understand.please help me.
thank you very much.

[syedz]

@soulefmassoud

Are you using Synplify for synthesis? Is this a post synthesis project in ISE/PlanAhead?

Check the section of code which is inferring OBUFT and replace it with IOBUF primitive in RTL. Check the language templates in ISE to know the instantiation template of IOBUF or check the HDL library user guide of the device you are using.

--Syed

[soulefmassoud]

I don't using Synplify for synthesis.this a post synthesis project in ISE.
please can you give me this steps.

[syedz]

@soulefmassoud,

Can you share your ISE archive project to debug the issue? In ISE GUI, Select Project-->Archive project.. 

This will save you project in .zip format. Please share this .zip file.

--Syed