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Adventurer
Adventurer
14,079 Views
Registered: ‎04-08-2009

planahead does not recognize ngc cores

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Hi,

I have a project that uses a block ram core from Xilinx Core Gen. I added the wrapper file and the file with .ngc extension to the plan ahead project using "add source". The ngc file shows up under Source->libraries->NGC->unreferenced->multiplier32X32Bits.ngc.

 

When I try to implement my netlist I get the following error:

[NgdBuild 604] logical block 'io_interface/dac_controller/dac_gain_mult' with type 'multiplier32x32bits' could not be resolved. A pin name misspelling can cause this, a missing edif or ngc file, case mismatch between the block name and the edif or ngc file name, or the misspelling of a type name. Symbol 'multiplier32x32bits' is not supported in target 'spartan3e'.

 

The same file compiles fine in project navigator (ISE) with macro search path set to the folder that contains that ngc file.

 

I should note that when I added the wrapper file and ngc file to the planahead project, I did not tick the box that said " copy to project folder"

 

Any ideas why planahead cannot locate the ngc properly.

 

I attached a picture of the error

 

Thanks a lot for any help resolving this issue.

Amish


planahead pic.jpg
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Adventurer
Adventurer
20,841 Views
Registered: ‎04-08-2009

For those who run into this issue in the future. This is the answer from the xilinx rep:

 

Under Translate/More add the follow "-sd C:\perforce\projects\DEV\E9318_SuperNova\P07_Compensator_FPGA_FASTDSP\Source\src\Cores\DPRAM256x32Bits

 

do this for all cores

 

-sd is basically setting macro search path like I use to do in project navigator (ISE).

 

Clearly planahead 13.3 is not smart enough to look for ngc file in the same directory as the .vhd wrapper

 

Hope this solves the issue. Thanks for help,

Amish

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Adventurer
Adventurer
14,078 Views
Registered: ‎04-08-2009
Forgot to add using Plan ahead 13.3 with an RTL project
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Xilinx Employee
Xilinx Employee
14,071 Views
Registered: ‎04-16-2008

A bit of a "shot in the dark", but I believe the file name needs to exactly match the module name.  You mentioned the file name had a lower case "bits" and the error complains about the module with an uppercase "Bits".  

 

If this is not the issue, you may want to open a case with tech support to get someone to take a quick look at it.

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Anonymous
Not applicable
14,054 Views

As I know, it is a bug in 13.3. You can try to set the "Hierarchy Update" as 'No update" can solve that problem. 

 

 

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Adventurer
Adventurer
20,842 Views
Registered: ‎04-08-2009

For those who run into this issue in the future. This is the answer from the xilinx rep:

 

Under Translate/More add the follow "-sd C:\perforce\projects\DEV\E9318_SuperNova\P07_Compensator_FPGA_FASTDSP\Source\src\Cores\DPRAM256x32Bits

 

do this for all cores

 

-sd is basically setting macro search path like I use to do in project navigator (ISE).

 

Clearly planahead 13.3 is not smart enough to look for ngc file in the same directory as the .vhd wrapper

 

Hope this solves the issue. Thanks for help,

Amish

View solution in original post

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Xilinx Employee
Xilinx Employee
13,995 Views
Registered: ‎03-31-2011

This behavior is by design.  All sources that are to be used in a project should be added to the proejct.  In this case the best option is to add the specific NGC files that you want the design to use to the project.  This way there is no ambiquity about what files are being picked up (e.g. if you have duplicate NGCs in diferent diretories).

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