06-14-2020 07:05 AM
Hi, maybe you can help me with PR problem: Im working on kintex 7 fpga. When I am loading my full design everything is Ok. But when the microblaze loading the reconfigurable partition- something bad happens (I can see a different behavior in each version). I saw in VIVADO 'device' window that some static content is placed inside my reconfigurable PBLOCK. why?
when I'm using the reset_after_reconfig feature the static and the reconfigurable partition are finally separated. How can I seperate them without this feature?
10-06-2020 04:05 PM
Does the Reconfigurable Partition pblock have the EXCLUDE_PLACMENT property set to TRUE or 1? If not, this would let non-pblock owned logic to be placed within the pblock.
If it is set, the community would probably need more information to help. For example, are you synthesizing each Reconfigurable Module (RM) separately from the static with the static synthesis having black boxes for each RM?
Looking at the synthesis results, can you open the RM design checkpoint and see the static logic? This sounds unlikely if you are following the guidelines of synthesizing separately.
10-07-2020 08:58 PM
If your pblock for RP splits the PU neglectfully, the snapping mode will resize your pblock of RP, which may cause the area covered by your RP pblock not belongs to the real RP pblock. (You can check the derived range of the RP pblock)
Loading RM causes the function incorrect: Please check that whether you apply proper decoupling method on the boundary signals.