09-25-2014 01:33 AM
I want to migrate xps ip core to vivado 2014.1 , this ip core is writed by our company . But it's so big , source code about 10000+ line. It have some define files , compile order must right .
But when I use vivado package IP . guided by Lab 5 "Converting Legacy EDK IP to Use in IP Integrator" from ug940-vivado-tutorial-embedded-design.pdf.
After "create and package new IP" dialoge , It told me parsing error ! more and more define value could not find.
In xps , it have *.pao file , but in vivado , what file do that things?
in ug940-vivado-tutorial-embedded-design.pdf , it said if a data/*pao file is present , this file is read and assoiated library information are used, as is the case for this edk pcore ip . I don't know it's mean? but the result mydata/ *.pao file does not worked in vivado !
In vivado , what file do that things? define the compile order like xps pao file.
Thanks in Advance !
09-25-2014 04:34 AM
09-25-2014 02:29 AM
paste some message :
CRITICAL WARNING: [HDL 9-870] Macro <TX_EN_WIDTH> is not defined. [C:/vivado_ip/pcores/axi_s_ip_v1_00_a/hdl/verilog/axi_s_ip.v:260]
ERROR: [IP_Flow 19-259] [HACGPHdlInterfaceParser] Failed analyze operation while parsing HDL.
ERROR: [IP_Flow 19-258] [HDL Parser] Error parsing HDL file [C:/vivado_ip/pcores/axi_s_ip_v1_00_a/hdl/verilog/axi_s_ip.v].
WARNING: [IP_Flow 19-965] There are no component ports to infer bus interfaces.
WARNING: [IP_Flow 19-378] There are no ports found from top-level file axi_s_ip.v.
ERROR: [Common 17-39] 'ipx::package_project' failed due to earlier errors.
My question is : In vivado , which file of ip core define the compile order like xps pao file do.
09-25-2014 04:34 AM
10-26-2014 02:26 AM
Is there have file to define the compile order in Vivado. I want find the second way define synthesize source file order Except the manner from GUI .
If have more source files( >30). In GUI it will be very slow and not efficiency when you create a new project or move it to another project.