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Adding a Debug ILA to the MicroBlaze Instruction Trace

Xilinx Employee
Xilinx Employee
3 0 974

MicroBlaze is a Soft Processor IP available in the Vivado IP catalog. There are various ways to debug the MicroBlaze.

This can be done in Vitis, or directly from the XSCT via the MDM.

In this blog we will discuss how to add an ILA to the MicroBlaze Instruction Trace port so that we can see in Hardware how the MicroBlaze is behaving.


Hardware Design:

I have used Vivado 2020.2 to create a simple Hello World Block design targeting a Xilinx VC707 board. However, the flow will be agnostic to the board, or indeed the design used.


Adding Trace Debug:

Enable the Trace Bus in the MicroBlaze configuration.


Then expand the Trace port on the MicroBlaze, right click on the Trace_PC and Trace_Valid_Instr and select Debug:


Then use the Run Connection Automation, and the pop up GUI will add the ILA for you.


So far we have completed the following tasks:

  • Generate the Output Products
  • Create the HDL wrapper
  • Generate Bitstream
  • Export Hardware (Include bitstream)

Creating the Software Design:

Launch Vitis (Tools -> Launch Vitis IDE), and create your platform. Use the Application templates to create a Hello World application.

I used updatemem to populate the BRAM with the hello world executable. You could also use Vitis to download the executable.

Testing in Hardware Manager:

Launch the Hardware Manager from Vivado, connect to your board and program the device:


Set up the trigger:


Let's trigger on main:


Here, I set a trigger on a Valid Instruction and the  PC at 0x584:


My Capture settings are shown below:


I have window depth set to 1024, and I trigger in the middle of this (512). This means that I see what happens before and after the trigger.

Now, Arm the trigger:


If a stall occurs:

In the event of a stall, use the XSCT to stop the MicroBlaze. This will give the PC of where the MicroBlaze has stalled.

Then use this with the Trace_PC in the Hardware Manager, and simple do a rst -proc and con to dump the Trace of the PC leading up to the stall: