Many of the Video IP cores come with example designs. These designs are used to showcase the IP, as well as to provide an example that can be used for reference when using the IP core in your own design.
These IP Example designs are usually described in Chapter 5 of the IP's product guide.
Product guides can be found on the IPs product page, in Document Navigator, or in the Video Design Hub.
HDMI VCU118 Example Design Overview
There are two Xilinx HDMI IP cores, a Source IP core (HDMI 1.4/2.0 TX Subsystem) and a Sink IP core (HDMI 1.4/2.0 RX Subsystem).
These IP cores are described in (PG235) and (PG236). Chapter 5 of these Product Guides contains a table listing the HDMI 1.4/2.0 example designs.
As the table shows, there is a VCU118 example design, but no VCU128 example design.
Note: As the table lists, there is no DRU clock available in passthrough mode because there is no oscillator pinned out to a gtrefclk in the banks near the HDMI core.
Here are the steps I used to port the HDMI VCU118 design to the VCU128 board. These steps are meant to be used as an example, and this is not the only way that it can be done.
1. The first step when porting a design is to make sure that the new hardware platform is built so that it can support the design.
The best way to begin is to list the requirements for the HDMI design. By using Figure 5-3 from the Product Guide, and focusing on the I/O (highlighted) we can see what the design requires.
Note: the VCU118 board does not have the nidru gtrefclk and neither does the VCU128.
List of requirements:
TMDS clock pinned out to FMC
3 GT pins for TX data pinned out to FMC
TX reference clock pinned in from FMC
RX reference clock pinned out to FMC
RX reference clock pinned in from FMC
3 GT pins for RX data pinned out to FMC
**Double-check surrounding banks for programmable NI-DRU clock source
2. Now that we know the requirements, we can check the VCU128 to make sure that they exist.