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DPR with Zynq Ultrascale+ (board zcu102 rev 1.0)

Posts: 20
Registered: ‎01-13-2017

DPR with Zynq Ultrascale+ (board zcu102 rev 1.0)

[ Edited ]

Is it normal/possible that performing DPR through the PCAP, all the registers of the static region of the FPGA are reset?


The walkaround we are using is to set up again the register after every DPR but this is NOT how the issue should be managed and the advantages of using DPR are deleted!!


However, the same application (running on Linux based OS, using the fpga_manager upon Zynq-7000 families FPGAs) is NOT having such problems. Do you know why? Is somebody having the same problems?


I am available for sharing more details related to the problem.