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Observer olwefin
Observer
7,764 Views
Registered: ‎12-22-2014

AXI CDMA SG descriptors aligment lost of space

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Hello all,

 

I'm starting to use/impelemt the AXI CDMA with SG option enabled.

I've been reading that the transfer descriptors are 8 double words size ( 8 x 32 bits)  but according to the Note into PG034 page 35 the descriptors must be aligned on 16 32-bits words.

 

Therefore when i want to define descriptors in a memory first one will be starting a address 0x00, the second one at 0x40 and so on but the descriptor itself use only memory from 0x00 to 0x1C and from 0x40 to 0x5C   and so on ...

 

Thus, between two descriptors there is a 8x32bits memory space lost in between. 

 

Is there a way to avoid that?  an option to say align the descriptors at a 8x32bits words ?   is this lost space usefull for something else i'm not, yet, aware of ??

 

thanks in advanced for your support.

 

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Xilinx Employee
Xilinx Employee
14,883 Views
Registered: ‎08-02-2011

Re: AXI CDMA SG descriptors aligment lost of space

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Hello,

 

My guess is that the reason for this is because it's probably some degree of shared code with the other DMAs for the SG stuff. The AXI DMA, for example, uses more registers in its BD. In order to be able to share RTL among the two, you have to specify max. 

 

In the common use case where DDR is used, 8 'wasted' words isn't a big deal at all.

 

Are you using BRAM or something for SG storage? There's no way to change this alignment in the core itself, but you could put a address re-mapping shim between the DMA and SG memory if it's really that critical.

www.xilinx.com
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2 Replies
Xilinx Employee
Xilinx Employee
14,884 Views
Registered: ‎08-02-2011

Re: AXI CDMA SG descriptors aligment lost of space

Jump to solution

Hello,

 

My guess is that the reason for this is because it's probably some degree of shared code with the other DMAs for the SG stuff. The AXI DMA, for example, uses more registers in its BD. In order to be able to share RTL among the two, you have to specify max. 

 

In the common use case where DDR is used, 8 'wasted' words isn't a big deal at all.

 

Are you using BRAM or something for SG storage? There's no way to change this alignment in the core itself, but you could put a address re-mapping shim between the DMA and SG memory if it's really that critical.

www.xilinx.com
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Observer olwefin
Observer
7,607 Views
Registered: ‎12-22-2014

Re: AXI CDMA SG descriptors aligment lost of space

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Hello,

 

thanks for your answer.

Indeed, my SG descriptors list will be stored internally to the FPGA, in sets of BRAM. Thus loosing half space of my bram to store this list is REALLY a pain for me.

 

thansk for the advice, i'll look around a kind of address remapping in between both devices, at AXI interface, to fully use my BRAMs space.

 

regards,

 

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