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Anonymous
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Bitstream Generation with embedded .elf for processor in System Generator

Hello,

 

I am working with the ML605 board and have a System Generator project that i imported into the ISE workflow. The system generator project contains a EDK processor for which i have written code in SDK. For debugging i create a bitstream with ISE and then download it to the board using SDK to run the code and debug the code. Now i would like to create a bitstream with the SDK code embedded into it so i can download it to the FPGA using impact or create a ACE File.

 

I am not sure how to add the SDK code to the ISE project. I tried to add a new souce (.elf source) however the ELF/Xmp file associated wizard does not find the microblaze processor which is in the system generator project. Is there another way to update the bitstream with the elf file?

 

Thank you,

Donny

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Xilinx Employee
Xilinx Employee
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Registered: ‎08-02-2007

Re: Bitstream Generation with embedded .elf for processor in System Generator

Hello Donny,

 

Add the xmp to your ISE Project Hierarchy.

 

In the XPS GUI go to Project Tab --> ELF Files --> Microblaze_0 instance --> Impl Executable(Browse to the elf that is created in SDK)

 

This should take care of the ELF in ISE.

 

--Hem

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Xilinx Employee
Xilinx Employee
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Registered: ‎07-11-2011

Re: Bitstream Generation with embedded .elf for processor in System Generator

Hi,

 

You may also cross check your flow against "Designing with Embedded Processors and Microcontrollers" section og UG640

 

http://www.xilinx.com/support/documentation/sw_manuals/xilinx14_7/sysgen_user.pdf

 

 

 

Regards,

Vanitha

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Anonymous
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Re: Bitstream Generation with embedded .elf for processor in System Generator

Hi,

 

Thank you for your help. I read through the UG640 document and gone through the tutorials before to learn how to use the EDK with SysGen. However i was not able to find any information regarding the scenerio where the SysGen project is a subproject inside a bigger ISE project. 

 

Regarding Hem's comment, if i add the xmp. project directly to my ISE project will that cause a conflict with the SysGen project with the imported xmp that is already in my ISE project? Would that add two microprocessors to my final design?

 

Regards

Donny

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Xilinx Employee
Xilinx Employee
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Registered: ‎08-02-2007

Re: Bitstream Generation with embedded .elf for processor in System Generator

Hi,

 

Why would there be two microprocessors in the design?

 

I am assuming that you are trying to export sysgen netlist as a pcore into the edk sub-system.

 

--Hem

 

 

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Anonymous
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Re: Bitstream Generation with embedded .elf for processor in System Generator

Hello

I am importing the xps project into sysgen and then netlisting the whole sysgen project with the edk processor as a subproject in ISE. I am not generating a pcore to add to the xps project.

Donny
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