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simchask
Explorer
Explorer
844 Views
Registered: ‎11-23-2017

Confused about two ELF files

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Why is there an option for associated ELF file for simulation sources?

Is it possible to write a testbench from the SDK, rather than writing it in VHDL?

Is the design source not loaded during simulation?

elf.png

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stephenm
Moderator
Moderator
1,046 Views
Registered: ‎09-12-2007

As the GUI suggests; one is for design sources, and the other is for simulation sources.

 

Question is, why would I need a different ELF for simulation, and design sources? Well, lets say your application

was toggling an LED in the hardware you would slow this down so it was visable to your eye. However, in simulation, you dont really need to do this.

 

For example

 

gpio.PNG

 

No, you cannot write a testbench in SDK. I have added a debug techniques doc here

The simulation sources, and design source as seperate

View solution in original post

1 Reply
stephenm
Moderator
Moderator
1,047 Views
Registered: ‎09-12-2007

As the GUI suggests; one is for design sources, and the other is for simulation sources.

 

Question is, why would I need a different ELF for simulation, and design sources? Well, lets say your application

was toggling an LED in the hardware you would slow this down so it was visable to your eye. However, in simulation, you dont really need to do this.

 

For example

 

gpio.PNG

 

No, you cannot write a testbench in SDK. I have added a debug techniques doc here

The simulation sources, and design source as seperate

View solution in original post