04-14-2010 10:34 AM
Hello,
I am following XAPP1053 to bootload applicaiton from SPI flash with XPS11.4, I got the following errors:
Xil3S1800ADSP_Rev1_Serial_Flash_v92/code/SF_commands.c:171: undefined reference to `XSpi_mGetControlReg'
Xil3S1800ADSP_Rev1_Serial_Flash_v92/code/SF_commands.c:171: undefined reference to `XSpi_mSetControlReg'
and other undefined reference in bootload.c and SF_commands.c.
Then I included xspi.h into the bootload.c and SF_commands.c file (they only had xspi_l.h file included), I got the following errors:
Xil3S1800ADSP_Rev1_Serial_Flash_v92/code/serial_flash_bootloader/bootload.c:88: error: invalid type argument of '->'
and other similar errors.
I traced down to the macro definition of the XSpi_mGetControlReg and other XSpi_m* funciton, it looks like the definition (interface) has changed (from instancePointer to baseAddress). I am wondering if these related to the XPS version (the XAPP 1053 is written for rev 9.2) and I am using rev11.4.
Basiclly I just want to bootload applicaiton from SPI flash. XAPP1053 gives good example. But I just don't know this will work on XPS11.4
Any suggestions will be highly appreciated. Thank you.
Tom
04-15-2010 06:19 AM
The Xilinx SPI Driver underwent major changes between 9.2 and 10.1. The code in XAPP1053 is not compatible with the drivers in 10.1 or 11.x. You have a couple choices.
You can purposely roll back the driver in 11.4 to match what was used in XAPP1053.
Or, you can look at an updated design. The following design employs a SPI bootloader on the 1800A board based on 11.4 latest drivers:
www.em.avnet.com/spartan3a-dsp --> Support Files & Downloads --> > S3A1800DSP Serial Flash Bitstream Update over Ethernet
Bryan
04-15-2010 06:19 AM
The Xilinx SPI Driver underwent major changes between 9.2 and 10.1. The code in XAPP1053 is not compatible with the drivers in 10.1 or 11.x. You have a couple choices.
You can purposely roll back the driver in 11.4 to match what was used in XAPP1053.
Or, you can look at an updated design. The following design employs a SPI bootloader on the 1800A board based on 11.4 latest drivers:
www.em.avnet.com/spartan3a-dsp --> Support Files & Downloads --> > S3A1800DSP Serial Flash Bitstream Update over Ethernet
Bryan
04-16-2010 04:53 AM
Bryan,
Thank you for the quick response. The documentation from Avnet (written by you I guess) is very good. I had no problem to follow it and bootloaded my code from SPI flash. I haven't try to download from Ethernet yet. Still have two questions I am not sure:
1. If I use SDK for software development (instead of XPS), by using linker script, I can choose the location for code, data (I put these two in DDR2) and stack & head (I put these two in BRAM through ilmp_cntrl_dlmp_cntl). Then SDK genertate .elf file. Does this design flow affect the bootload procedure ? I guess the answer is no. I guess bootload copy the binary image to DDR2, then "somehow" put the code/data to DDR2 base address (in my case, 0x8000,0000), and use BRAM for heap/stack. Also the vectors.reset. vectors.interrupt etc will be in the 0x0000,0000 (BRAM) area. I am not sure my understanding is correct.
2. I guess the procedure will work for M25P16 or M25P64 SPI flash parts (in fact, they look pin-to-pin compatible with S33). Am I right ? For different size of SPI flash, we can modify the bootload.c to arrange the code location (in your bootload.c, it was 0x0040,0000). Is this correct ?
Again, many thanks for the detailed documentation.
Tom
04-16-2010 12:42 PM
Tom,
1. The current flow is likely not exactly compatible with what you are trying to do. But, it's close. The problem with converting your application to binary is that the binary image assumes offset/address information based on the position in the file. If you have an application with chunks of code across your full address range, then objcopy is going to 0-fill the space in between. For example, if you did what you suggest below with no changes with some BRAM code in the 0x0 - 0x8000 range and then other pieces of code in DDR2 at 0x80000000, then you are going to generate a binary file that is 0-filled between 0x8000 and 0x80000000, which will be like a 2GB file. Not very practical.
You can get around this two different ways that I can think of. Just like you're dealing with the vectors separately, you could deal with vectors + BRAM code in one piece, and then the DDR2 code in a separate piece. The other option is to use a smarter file format to store your code in Flash, like SREC. Then use an SREC Interpreter for a bootloader rather than the simple binary copy bootloader in this application. Xilinx provides an example of an SREC bootloader with their Flashwriter program, so it might not be too difficult to port.
2. The M25P parts are pin compatible with the S33. You are correct that you can re-arrange the locations of things to fully utilize the Flash in your system.
Bryan
04-17-2010 07:34 AM
Hi Bryan,
Thank you for the answers. I tried with SDK link script and uses DDR2 for code/data, BRAM for stack/heap/vector. The mb-objcopy generate a reasonalble size file (10KB) and the design flow worked. I think if only stack/heap are used in BRAM, mb-objcopy will not 0-fill the space. Of course, I have no reason to assign stack/heap only to BRAM -- I can always use DDR2 for them. Or, as you suggest, use SREC format.
It looks S33 is going to obsolete and M25P is easier to get.
Thanks ,
Tom
06-01-2010 04:46 AM
Hello Bryan
Had you already done an bootloader with two microblaze? So one should be the master which copies the two program into the DDR memory. But what should do the other? Has you any idea?
Thanks a lot
daniel
06-01-2010 06:34 AM
Daniel,
I haven't created a dual-MicroBlaze design. Perhaps you could use a GPIO in the bootloading MicroBlaze tied to reset or interrupt of the other MicroBlaze. When the bootloading MicroBlaze is done bootloading, then it could trigger its GPIO. Then the 2nd MicroBlaze could execute the function pointer to jumpt to the proper location in DDR.
Regards,
Bryan
06-02-2010 11:44 PM
Hello Bryan
I have implemented this solution and it will work. Thanks for your answer.
daniel
06-08-2010 09:12 PM
Hi Daniel, Could you kindly tell me, where you get the tool convert .b to .mcs file. then combine bootloader .mcs and application .mcs to one .mcs file. Thanks a lot!
06-14-2011 10:03 PM
Hello bhfletcher
I am working on Spartan 6 FPGA with S25FL129 SPI Flash in ISE 12.4. I am using S3A1800DSP Serial Flash Bitstream Update over Ethernet application suggested by you. The script is for loading 3 bit files along with an application and its vectors into Spartan 3ADSP. I have modified this script for loading one bit file along with application and vectors into Spartan 6.
Following is the modified script:
cd .
echo off
set bitstream1=top.bit
::set bitstream2=ledflash_routed_1.bit
::set bitstream3=ledflash_routed_2.bit
set application=CPL_UDP_Tx_app
set vector=CPL_UDP_Tx_vectors
set spiPartName=s25fl129
::set multiboot_offset=100000
::set backup_offset=200000
set app_offset=0x180000
set vector_offset=0x170000
:: Step 1. Convert download.bit and two application bits to mcs
@echo setPreference -pref StartupClock:Auto_Correction > create_mcs.cmd
@echo setPreference -pref MessageLevel:Detailed >> create_mcs.cmd
@echo setPreference -pref SpiByteSwap:Auto_Correction >> create_mcs.cmd
@echo setMode -promfile >> create_mcs.cmd
@echo setSubmode -pffmbspi >> create_mcs.cmd
@echo setMbBpiDevice -device SPARTAN6LX >> create_mcs.cmd
@echo setMbBpiChain -serial >> create_mcs.cmd
@echo setMbBpiType -type TYPE_MB_SPI >> create_mcs.cmd
@echo addDesign -version 0 -startaddress 000000 >> create_mcs.cmd
@echo addDeviceChain -index 0 >> create_mcs.cmd
@echo addDevice -p 1 -file %bitstream1% >> create_mcs.cmd
::@echo addDesign -version 1 -startaddress %multiboot_offset% >> create_mcs.cmd
::@echo addDeviceChain -index 0 >> create_mcs.cmd
::@echo addDevice -p 1 -file %bitstream2% >> create_mcs.cmd
::@echo addDesign -version 2 -startaddress %backup_offset% >> create_mcs.cmd
::@echo addDeviceChain -index 0 >> create_mcs.cmd
::@echo addDevice -p 1 -file %bitstream3% >> create_mcs.cmd
@echo generate -format mcs -generic -spi -fillvalue FF -output bitstream.mcs >> create_mcs.cmd
@echo quit >> create_mcs.cmd
D:\Xilinx\12.4\ISE_DS\ISE\bin\nt\impact -batch create_mcs.cmd
:: Step 2. Convert binary application and vectors to mcs
xmcsutil -accept_notice -i %application%.b -o %application%.mcs -29
xmcsutil -accept_notice -i %vector%.b -o %vector%.mcs -29
:: Step 3. combine bitstream, application, and vector mcs files
xmcsutil -accept_notice -i bitstream.mcs %application%.mcs %vector%.mcs -o combined.mcs -16 -segaddr 0x00 %app_offset% %vector_offset% -usedataaddr
:: Step 4. Program the S33 on the Sp3A DSP Starter board
:: For Platform Cable USB II and some I
xip -accept_notice -xopt 12 -skip_syncword_check -mcs -spi_epv -i combined.mcs -o verify.txt -select_cable 2
:: For some Platform Cable USB I
:: xip -accept_notice -skip_syncword_check -mcs -spi_epv -i combined.mcs -o verify.txt -select_cable 2
:: For Parallel Cable IV
:: xip -accept_notice -xopt 4 -skip_syncword_check -mcs -spi_epv -i combined.mcs -o verify.txt -select_cable 6
:: cleanup
::del *.cmd
::del *.prm
::del *.log
::del %application%.mcs
::del %vector%.mcs
::del bitstream.mcs
::del *.cfi
pause
Even after making sure that Impact 12.4 is used, while creating the mcs for bit file, Impact gives following error:
INFO:iMPACT:2659 - Input device SPARTAN6LX is not valid.
Valid devices are:
SPARTAN3E, SPARTAN3A, VIRTEX5.
Can you please help me in figuring out what could be going wrong?
Regards,
wg
06-20-2011 01:31 PM