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Explorer
Explorer
3,809 Views
Registered: ‎04-09-2008

EDK 12.2: Problem Building Hard_Ethernet_MAC After Project Upgrade

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I just installed ISE Design Suite: System Edition 12.2 yesterday.  I opened up an old project I had been using in 12.1.  EDK asked if I would like to upgrade and I answered "yes."  With respect to the hardware, EDK informed me that it was going to update the following peripherals:

 

microblaze: 7.30.a -> 7.30.b

mpmc: 6.00.a -> 6.01.a

 

The upgrade completed.  I selected "Clean Hardware" from the Hardware menu.  I selected "Generate Bitstream" from the Hardware menu.  I now receive the following errors on build:

 

 

ERROR:PhysDesignRules:1860 - The delay controller
   Hard_Ethernet_MAC/Hard_Ethernet_MAC/V6HARD_SYS.I_TEMAC/SINGLE_GMII.IO_YES_01.GEN_INSTANTIATE_IDELAYCTRLS[1].idelayctr
   l0 is placed at site IDELAYCTRL_X2Y2 but none of the IODELAYs calibrated by this IDELAYCTRL are being used. The
   IDELAYCTRL should be removed from the design and the <idelayctrl_site.rdy> net should be connected to GLOBAL_LOGIC_1.
   A script is available to automate this process. For more details, please search the Xilinx Answers Database for
   IDELAYCTRL. 
ERROR:PhysDesignRules:1860 - The delay controller
   Hard_Ethernet_MAC/Hard_Ethernet_MAC/V6HARD_SYS.I_TEMAC/SINGLE_GMII.IO_YES_01.GEN_INSTANTIATE_IDELAYCTRLS[4].idelayctr
   l0 is placed at site IDELAYCTRL_X1Y2 but none of the IODELAYs calibrated by this IDELAYCTRL are being used. The
   IDELAYCTRL should be removed from the design and the <idelayctrl_site.rdy> net should be connected to GLOBAL_LOGIC_1.
   A script is available to automate this process. For more details, please search the Xilinx Answers Database for
   IDELAYCTRL. 
ERROR:PhysDesignRules:1860 - The delay controller
   Hard_Ethernet_MAC/Hard_Ethernet_MAC/V6HARD_SYS.I_TEMAC/SINGLE_GMII.IO_YES_01.GEN_INSTANTIATE_IDELAYCTRLS[3].idelayctr
   l0 is placed at site IDELAYCTRL_X1Y1 but none of the IODELAYs calibrated by this IDELAYCTRL are being used. The
   IDELAYCTRL should be removed from the design and the <idelayctrl_site.rdy> net should be connected to GLOBAL_LOGIC_1.
   A script is available to automate this process. For more details, please search the Xilinx Answers Database for
   IDELAYCTRL. 

 

 

Diff'ing the new system.mhs against my previous version, I see two lines have changed.  These lines are only the "PARAMETER HW_VER =" lines for the mpmc and microblaze peripherals.

 

I have not tried generating a new project yet.  I would rather not have to incorporate all of my custom peripherals again, if possible.

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Explorer
Explorer
4,601 Views
Registered: ‎04-09-2008

Re: EDK 12.2: Problem Building Hard_Ethernet_MAC After Project Upgrade

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In the last post, I forgot to mention that I am using an ML605 development board.

 

I generated a brand new project using the 12.2 wizard and compared the Hard_Ethernet_MAC sections in my upgraded system.mhs and the new system.mhs.  I found that my old project was attempting to define 6 IDELAYCTRL locations.  The newer project uses only the IDELAYCTRL_X2Y1 instance.

 

I changed two lines of my .mhs to:

 

BEGIN xps_ll_temac
...
...
PARAMETER C_NUM_IDELAYCTRL = 1
PARAMETER C_IDELAYCTRL_LOC = IDELAYCTRL_X2Y1
...
...

 


 The errors are no longer a problem.

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Explorer
Explorer
4,602 Views
Registered: ‎04-09-2008

Re: EDK 12.2: Problem Building Hard_Ethernet_MAC After Project Upgrade

Jump to solution

In the last post, I forgot to mention that I am using an ML605 development board.

 

I generated a brand new project using the 12.2 wizard and compared the Hard_Ethernet_MAC sections in my upgraded system.mhs and the new system.mhs.  I found that my old project was attempting to define 6 IDELAYCTRL locations.  The newer project uses only the IDELAYCTRL_X2Y1 instance.

 

I changed two lines of my .mhs to:

 

BEGIN xps_ll_temac
...
...
PARAMETER C_NUM_IDELAYCTRL = 1
PARAMETER C_IDELAYCTRL_LOC = IDELAYCTRL_X2Y1
...
...

 


 The errors are no longer a problem.

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Observer
Observer
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Registered: ‎01-06-2010

Re: EDK 12.2: Problem Building Hard_Ethernet_MAC After Project Upgrade

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