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7,004 Views
Registered: ‎05-13-2016

Extending the FreeRTOS example design - where is the interrupt setup and ISR

I have successfully gotten the FreeRTOS LWIP echo server up and running (as well as ported to C++).

 

I am trying to understand how the interrupt controller is initialized and where the ISR is located, so that I can add additional interrupts to the design, and merge in my existing standalone application (turning some of my polled routines into interrupt driven tasks),

 

I have tried to navigate back from LWIP_INIT, to see if that will lead me to what I need to learn, but no luck.

 

 

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10 Replies
Scholar austin
Scholar
6,997 Views
Registered: ‎02-27-2008

Re: Extending the FreeRTOS example design - where is the interrupt setup and ISR

p.g,

 

Zynq, Artix, or Kintex?

 

Austin Lesea
Principal Engineer
Xilinx San Jose
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6,987 Views
Registered: ‎05-13-2016

Re: Extending the FreeRTOS example design - where is the interrupt setup and ISR

Hey Austin, How are you doing? Artix!
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Scholar austin
Scholar
6,982 Views
Registered: ‎02-27-2008

Re: Extending the FreeRTOS example design - where is the interrupt setup and ISR

Paul,

 

Excellent.

 

As you must be using MicroBlaze, there should be the interrupt controller block in the tools visible for this LWIP reference design (if not, you could add an interrupt controller).  Need to go in, and assign the new needed interrupts, and the create the interrupt service routines to handle them.

Austin Lesea
Principal Engineer
Xilinx San Jose
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6,980 Views
Registered: ‎05-13-2016

Re: Extending the FreeRTOS example design - where is the interrupt setup and ISR

Specifically, I sort of expected a call to XIntc_Initialize(), but have not been able to find a reference to it.

 

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6,971 Views
Registered: ‎05-13-2016

Re: Extending the FreeRTOS example design - where is the interrupt setup and ISR

Unfortunately, it is not visible, but I am pretty sure that the example is using interrupts. Is it not?

 

Here is the two top levels.  I would assume that lwip_init() is setting up the INTC.  I cannot view the LWIP_INIT code.

 

I will reread the app note, but I was pretty sure that it at least uses the Timer.  There is a DMA controller, with several interrupts hooked up, and I was hoping it is using these as well.

 

int main()

{

sys_thread_new("main_thrd", (void(*)(void*))main_thread, 0,

THREAD_STACKSIZE,

DEFAULT_THREAD_PRIO);

 

 

 

vTaskStartScheduler();

while(1);

return 0;

}

 

int main_thread()

{

 

 

/* initialize lwIP before calling sys_thread_new */

lwip_init();

 

/* any thread using lwIP should be created using sys_thread_new */

sys_thread_new("NW_THRD", network_thread, NULL,

THREAD_STACKSIZE,

DEFAULT_THREAD_PRIO);

 

vTaskDelete(NULL);

 

return 0;

}

 

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Scholar austin
Scholar
6,935 Views
Registered: ‎02-27-2008

Re: Extending the FreeRTOS example design - where is the interrupt setup and ISR

Paul,

 

One would certainly think it might use interrupt.  But, it may not.  After all, it is the "light weight" version...

Austin Lesea
Principal Engineer
Xilinx San Jose
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6,934 Views
Registered: ‎05-13-2016

Re: Extending the FreeRTOS example design - where is the interrupt setup and ISR

I found the LWIP_INIT in the distribution directory

 

 

void
lwip_init(void)
{
  /* Modules initialization */
  stats_init();
#if !NO_SYS
  sys_init();
#endif /* !NO_SYS */
  mem_init();
  memp_init();
  pbuf_init();
  netif_init();

 

 

So I suppose I now I need to track down SYS_INIT

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Scholar austin
Scholar
6,930 Views
Registered: ‎02-27-2008

Re: Extending the FreeRTOS example design - where is the interrupt setup and ISR

INIT <> INT?

Austin Lesea
Principal Engineer
Xilinx San Jose
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6,920 Views
Registered: ‎05-13-2016

Re: Extending the FreeRTOS example design - where is the interrupt setup and ISR

I am looking at how the interrupts are being set up and used in the FreeRtos LWIP EchoServer design.  I believe the interrupts (INT) are possibly being set up in the INIT routing.

 

I went to the install directory, and found the source for lwip_init(), which calls sys_init() if it doesn’t exist.

 

 

void

lwip_init(void)

{

  /* Modules initialization */

  stats_init();

#if !NO_SYS

  sys_init();

#endif /* !NO_SYS */

  mem_init();

  memp_init();

  pbuf_init();

  netif_init();

 

So looking at the “#if !NO_SYS”, I got to thinking that maybe it is set up in the RTOS port.

 

Looking at the RTOS distribution, I did find the port.c code and it looks like it may be getting set up there.

 

 

static int32_t prvInitialiseInterruptController( void )

{

int32_t lStatus;

 

                lStatus = XIntc_Initialize( &xInterruptControllerInstance, configINTERRUPT_CONTROLLER_TO_USE );

 

                if( lStatus == XST_SUCCESS )

                {

                                /* Initialise the exception table. */

                                Xil_ExceptionInit();

 

                    /* Service all pending interrupts each time the handler is entered. */

                    XIntc_SetIntrSvcOption( xInterruptControllerInstance.BaseAddress, XIN_SVC_ALL_ISRS_OPTION );

 

                    /* Install exception handlers if the MicroBlaze is configured to handle

                    exceptions, and the application defined constant

                    configINSTALL_EXCEPTION_HANDLERS is set to 1. */

                                #if ( MICROBLAZE_EXCEPTIONS_ENABLED == 1 ) && ( configINSTALL_EXCEPTION_HANDLERS == 1 )

                    {

                                vPortExceptionsInstallHandlers();

                    }

                                #endif /* MICROBLAZE_EXCEPTIONS_ENABLED */

 

                                /* Start the interrupt controller.  Interrupts are enabled when the

                                scheduler starts. */

                                lStatus = XIntc_Start( &xInterruptControllerInstance, XIN_REAL_MODE );

 

                                if( lStatus == XST_SUCCESS )

                                {

                                                lStatus = pdPASS;

                                }

                                else

                                {

                                                lStatus = pdFAIL;

                                }

                }

 

                configASSERT( lStatus == pdPASS );

 

                return lStatus;

}

/*-----------------------------------------------------------*/

 

 I guess the next place to look is the vPortExceptionsInstallHandlers.

 

I am a little closer, but still not seeing how the interrupts are all tied together between FreeRTOS, LWIP, the TEMAC and echoserver design.  I have duplicated the interrupt connectivity that was in the example design.

 

intr[0] into the Interrupt controller comes from the Ethernet subsystem

intr[1] into the Interrupt controller is the S2MM interrupt out of the DMA

intr[2] into the Interrupt controller is the MM2S interrupt out of the DMA

intr[3] into the Interrupt controller is the UARTlite interrupt

intr[4] into the Interrupt controller is the Timer interrupt

 

I want to add additional interrupts into the system (intr[5] and intr[6]).

 

Furthermore, I have the design up and running on my hardware, and can echo from a client.  I really need to find out how the interrupts are set up in this example design, so that I can expand the functionality.

 

 

 

 

 

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4,306 Views
Registered: ‎05-13-2016

Re: Extending the FreeRTOS example design - where is the interrupt setup and ISR

Assuming that the Intc is runnin in this design, do I just add my own interrupt handler and register it with a call to "XIntc_Connect"

 

int XIntc_Connect(XIntc * InstancePtr, u8 Id,

XInterruptHandler Handler, void *CallBackRef)

{

XIntc_Config *CfgPtr;

/*

* Assert the arguments

*/

Xil_AssertNonvoid(InstancePtr != NULL);

Xil_AssertNonvoid(Id < XPAR_INTC_MAX_NUM_INTR_INPUTS);

Xil_AssertNonvoid(Handler != NULL);

Xil_AssertNonvoid(InstancePtr->IsReady == XIL_COMPONENT_IS_READY);

 

/* Connect Handlers for Slave controllers in Cascade Mode */

if (Id > 31) {

 

CfgPtr = XIntc_LookupConfig(Id/32);

 

CfgPtr->HandlerTable[Id%32].Handler = Handler;

CfgPtr->HandlerTable[Id%32].CallBackRef = CallBackRef;

}

/* Connect Handlers for Master/primary controller */

else {

/*

* The Id is used as an index into the table to select the

* proper handler

*/

InstancePtr->CfgPtr->HandlerTable[Id].Handler = Handler;

InstancePtr->CfgPtr->HandlerTable[Id].CallBackRef =

CallBackRef;

}

 

return XST_SUCCESS;

}

 

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