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dtubbs
Contributor
Contributor
572 Views
Registered: ‎07-01-2016

FSBL fails at "Xilinx Zynq MP Firs?" - bringing up custom UltraScale+ design

Greetings!

I'm brining up a new custom UltraScale+ design, and when the board boots, all I get is the text "Xilinx Zynq MP Firs" followed by one bad ASCII character. You can see from the attached image.

This is repeatable, in that each time I power-on the card I get exactly these characters and nothing more.  Any help would be appreciated!

-Dave

 

fsbl-output.png

 

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stephenm
Moderator
Moderator
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Registered: ‎09-12-2007

Are you sure that the bitstream used matches the target device. I do see this if I accidently boot a zcu111 image on a zcu102 for example.

How was the boot image created? in SDK, or Petalinux?

Can you share the BIF file used?

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dtubbs
Contributor
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Registered: ‎07-01-2016

Thanks for following up!

Right now, I'm jus trying to bring up the PS side, so I did not include a bitstream when I created BOOT.BIN.  After doing a petalinux-build, I followup with:

petalinux-package --boot --format BIN --fsbl ../path-to/zynqmp_fsbl.elf --project ../path-to-project --uboot ../path-to/u-boot.elf -o BOOT.BIN

The BIF file is found in my <plnx-project>/build/bootgen.bif:

the_ROM_image:
{

        [bootloader, destination_cpu=a53-0] /tmp/tmp.aLFcSTahYp/zynqmp_fsbl.elf
        [pmufw_image] /tmp/tmp.aLFcSTahYp/pmufw.elf
        [destination_cpu=a53-0, exception_level=el-3, trustzone] /tmp/tmp.aLFcSTahYp/bl31.elf
        [destination_cpu=a53-0, exception_level=el-2] /tmp/tmp.aLFcSTahYp/u-boot.elf
}

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ibaie
Xilinx Employee
Xilinx Employee
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Registered: ‎10-06-2016

Hi @dtubbs 

Did you start testing your board using Xilinx SDK? Example tests:

  1. Load helloworld application
  2. Load FSBL in JTAG boot mode

 

It's always good to ensure your FSBL has the right configuration of the hardware prior starting to boot a complete image with U-Boot.

Regards


Ibai
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