04-13-2021 10:12 AM
I am exporting the GPIO peripheral to PL using the EMIO interface.
I know that on Zynq 7000+, EMIO pin numbering starts at 54 and goes up to 117.
So logically EMIO has a pin reference of 54, EMIO => 55 and so on ...
What I do not understand is, why for a GPIO EMIO's width = 1, I have three GPIO signals ?
I only care about the GPIO output, how do I find what is the EMIO pin number ?
I saw the GPIO bus width can go up to 64, so does that mean there are 64x3 possible emio pins ? (I know it is not the case so I am confused).
Hope I make sense !
Thanks for any help,