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Visitor audiodane
Visitor
10,139 Views
Registered: ‎09-26-2012

How to read PL Parameter Values from PS SDK

Hello again,

 

For accurate reporting purposes, I am trying to access PL-side information from the PS-side of a Zynq device.  The information that I am interested in includes the clock frequencies coming out of the clock configuration block, as well as HDL instantiation parameters into some particular IP modules.  I need to log certain information including current clock frequencies that may change bitstream to bitstream..

 

Looking through the exported hardware platform I see that "ps7_init.h" includes the defines:

 

#define FPGA0_FREQ xxxxxx

#define FPGA1_FREQ xxxxxx

#define FPGA2_FREQ xxxxxx

#define FPGA3_FREQ xxxxxx

 

but the above values are not propogated through to the BSP's "xparameters.h" file, and when I try to add "ps7_init.h" to my SDK source files it complains that it cannot be found ("fatal error: ps7_init.h: No such file or directory").

 

 

As for IP parameters instantiated on the PL side, I have no clue where to start and would appreciate any tips and guidance.  An example may be an IP module instantiated at the top level HDL that has a "DATA_WIDTH parameter set.  This IP may exist outside of the block_design at the custom HDL level, so it may not align with the typical AXI bus widths, for example.

 

cheers,

..dane

http://audiodane.dandk.org
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7 Replies
Xilinx Employee
Xilinx Employee
10,126 Views
Registered: ‎08-02-2007

Re: How to read PL Parameter Values from PS SDK

hi,

 

is the module connected to PS? if the module has AXI interconnect and is connected to PS then you can give the module a address space and read it via SDK.

 

which clocks are you referring to?

 

--hem

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Visitor audiodane
Visitor
10,117 Views
Registered: ‎09-26-2012

Re: How to read PL Parameter Values from PS SDK

Well, yes, if the IP module was written to pass the values through an AXI interface bus.. :)

 

I agree that would be super easy.  That may be what I have to do, but today that's not the case.  The HDL today is very parameterized but was not originally designed for an interface to a processor.  HDL parameters were always available within the HDL, so why make a memory map to read them?  :)

 

re: clocks, I am referring to the "PL Fabric Clocks" clocks that come out of the Zynq Clock Generation block under Clock Configuration, labeled "FCLK_CLK0" through "CLK_CLK3."  they are getting mapped to "ps7_init.h" as "FPGA0_FREQ" through "FPGA3_FREQ", but do NOT propogate into the "xparameters.h" file in the BSP.  :(

 

..dane

http://audiodane.dandk.org
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Scholar stephenm
Scholar
10,104 Views
Registered: ‎05-06-2012

Re: How to read PL Parameter Values from PS SDK

The xparameters.h will only populate the info for the memory mapped IP. As these are the only relevant info for your processing system. If your IP has no processor interface, then the processor will not see it. This is expected.

 

That said, you can modifty the TCL file for the standalone bsp to include the data you want. You can use HSI to read the

properties of your IP and write these to the xparameters.h

 

Also, you can import the ps7_init.h file into your application sources if you want to use this here.

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Visitor audiodane
Visitor
10,097 Views
Registered: ‎09-26-2012

Re: How to read PL Parameter Values from PS SDK

Are there examples somewhere of what TCL file to modify and how to use the HSI that you talk about?

 

re: ps7_init.h, can this also be done in the TCL file?  I understand I can manually copy it in, but if the HW design changes then this file becomes stale.  I would much rather find a way to import the file (or at least the parameters) so that the BSP is always kept up-to-date.   I tried including the hw_platform in my application project's Build Settings-> Project References, but that did not seem to allow the ps7_init.h file to be found.

 

cheers,

..dane

 

http://audiodane.dandk.org
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Scholar stephenm
Scholar
10,088 Views
Registered: ‎05-06-2012

Re: How to read PL Parameter Values from PS SDK

The HSI commands are covered in ug1138.
 
I have created a simple script in 2015.1 that you can use as a reference (see attached). This used the TCL and HSI
to open the hw_design (HDF), see what the processor is (needed to write the header file in the correct location).
Creates said header file. Open the header file, uses HSI to get all parameters in the IP, gets the clks too writes these as #defines in header file. Closes header file. The header file gets wrtten to the bsp/processor/include folder.
 
To test, I created a Zynq project, with a custom IP in the PL. This is not connected to the Zynq memory map, so will not be includeed in the bsp:
 

I exported to SDK, and created a BSP. I placed the script in the SDK workspace:

In SDK, I build the BSP. I then opened the sdk shell:

I sourced the script:
xsct
source script.tcl
 
To run the proc, use the command below:
get_defines standalone_bsp_0 myip_0
standalone_bsp_0 is the name of my bsp, myip_0 is the name of the IP I want to get the defines for
Note: you will need to change this to suit your own design.
 
This will create a <IP>_header.h in the bsp include folder:

Next, clean the bsp
Project -&gt; Clean:

Verify that the header works:

&nbsp;
&nbsp;
&nbsp;</IP>

Note: you can use 2014.4 but the script will have to change to remove the HSI from the commands. For example hsi get_cells is just get_cells. Also when calling the shell the command is xsdk -batch instead of xsct
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Visitor audiodane
Visitor
10,073 Views
Registered: ‎09-26-2012

Re: How to read PL Parameter Values from PS SDK

Thank you stephenm!  Give me a week or so to get back to this and I will let everyone know how it went..

 

thank  you again!

..dane

http://audiodane.dandk.org
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Scholar stephenm
Scholar
10,064 Views
Registered: ‎05-06-2012

Re: How to read PL Parameter Values from PS SDK

No problem. The screenshots I added didn't make it to the post. So I hope I explained how to use the script I wrote.
However, let me know how you get on?
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