05-21-2015 06:29 AM
For accurate reporting purposes, I am trying to access PL-side information from the PS-side of a Zynq device. The information that I am interested in includes the clock frequencies coming out of the clock configuration block, as well as HDL instantiation parameters into some particular IP modules. I need to log certain information including current clock frequencies that may change bitstream to bitstream..
Looking through the exported hardware platform I see that "ps7_init.h" includes the defines:
#define FPGA0_FREQ xxxxxx
#define FPGA1_FREQ xxxxxx
#define FPGA2_FREQ xxxxxx
#define FPGA3_FREQ xxxxxx
but the above values are not propogated through to the BSP's "xparameters.h" file, and when I try to add "ps7_init.h" to my SDK source files it complains that it cannot be found ("fatal error: ps7_init.h: No such file or directory").
As for IP parameters instantiated on the PL side, I have no clue where to start and would appreciate any tips and guidance. An example may be an IP module instantiated at the top level HDL that has a "DATA_WIDTH parameter set. This IP may exist outside of the block_design at the custom HDL level, so it may not align with the typical AXI bus widths, for example.
05-21-2015 08:23 AM
is the module connected to PS? if the module has AXI interconnect and is connected to PS then you can give the module a address space and read it via SDK.
which clocks are you referring to?
05-21-2015 10:27 AM
Well, yes, if the IP module was written to pass the values through an AXI interface bus.. :)
I agree that would be super easy. That may be what I have to do, but today that's not the case. The HDL today is very parameterized but was not originally designed for an interface to a processor. HDL parameters were always available within the HDL, so why make a memory map to read them? :)
re: clocks, I am referring to the "PL Fabric Clocks" clocks that come out of the Zynq Clock Generation block under Clock Configuration, labeled "FCLK_CLK0" through "CLK_CLK3." they are getting mapped to "ps7_init.h" as "FPGA0_FREQ" through "FPGA3_FREQ", but do NOT propogate into the "xparameters.h" file in the BSP. :(
05-22-2015 02:26 AM
The xparameters.h will only populate the info for the memory mapped IP. As these are the only relevant info for your processing system. If your IP has no processor interface, then the processor will not see it. This is expected.
That said, you can modifty the TCL file for the standalone bsp to include the data you want. You can use HSI to read the
properties of your IP and write these to the xparameters.h
Also, you can import the ps7_init.h file into your application sources if you want to use this here.
05-22-2015 06:10 AM
Are there examples somewhere of what TCL file to modify and how to use the HSI that you talk about?
re: ps7_init.h, can this also be done in the TCL file? I understand I can manually copy it in, but if the HW design changes then this file becomes stale. I would much rather find a way to import the file (or at least the parameters) so that the BSP is always kept up-to-date. I tried including the hw_platform in my application project's Build Settings-> Project References, but that did not seem to allow the ps7_init.h file to be found.
05-22-2015 07:57 AM - edited 05-22-2015 10:32 AM
05-22-2015 07:14 PM
Thank you stephenm! Give me a week or so to get back to this and I will let everyone know how it went..
thank you again!
05-23-2015 03:30 AM