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chinton
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Registered: ‎05-21-2018

MMU settings: 32-bit vs 64-bit differences using baremetal

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I am trying to disable caching of specific memory regions in my baremetal application. If I create a 64-bit BSP and application, then the file xil_mmu.h has some #defines that I can use for manipulating the MMU table. Specifically, it contains the #define NORM_NONCACHE. I can use the definition with the function Xil_SetTlbAttributes(UINTPTR, u64) to disable caching on certain memory regions that I desire.

When I create a 32-bit BSP and application, the file xil_mmu.h does not contain the same #defines. It does not have NORM_NONCACHE defined. If I try to use the function Xil_SetTlbAttributes and pass in the same value that NORM_NONCACHE defines in 64-bit (0x401UL), like I did in the 64-bit application, then the memory regions become locked. If I try to access the memory regions then I get a data abort. Also, all of the memory in the address region becomes question marks in the memory viewer of the debugger.

Why does calling Xil_SetTlbAttributes(memAddress, 0x401UL) disable caching for the memory region in a 64-bit application, but the same call in a 32 bit application locks the memory region?

I am using SDK 2019.1

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chinton
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Registered: ‎05-21-2018

I still haven't been able to find any documentation to answer this, but I did some further inspection and I believe I found the answer. When I inspect the MMU table of a 32-bit application running on a Zynq Ultrascale+ part, it is very different than the MMU table of a 64-bit application. However, the MMU table of the 32-bit application looks exactly like the MMU table of an application running on a Zynq 7000 part.

If I use the defenitions in xil_mmu.h from a Zynq 7000 bsp then I can successfully disable caching on specific memory regions. The specific defenition that is needed from the Zynq 7000 bsp is:

#define NORM_NONCACHE 0x11DE2 	/* Normal Non-cacheable */

When I use this, then it works as expected.

View solution in original post

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chinton
Visitor
Visitor
448 Views
Registered: ‎05-21-2018

I still haven't been able to find any documentation to answer this, but I did some further inspection and I believe I found the answer. When I inspect the MMU table of a 32-bit application running on a Zynq Ultrascale+ part, it is very different than the MMU table of a 64-bit application. However, the MMU table of the 32-bit application looks exactly like the MMU table of an application running on a Zynq 7000 part.

If I use the defenitions in xil_mmu.h from a Zynq 7000 bsp then I can successfully disable caching on specific memory regions. The specific defenition that is needed from the Zynq 7000 bsp is:

#define NORM_NONCACHE 0x11DE2 	/* Normal Non-cacheable */

When I use this, then it works as expected.

View solution in original post

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