08-22-2019 01:18 AM
Hi,
In order to do some performance monitoring, I would like to use the internal APMs of the MPSoC. UG1085, Figure 15-1 shows where the APMs are located, further described in Chapter 15 - Axi Performance Monitor. However, when used with xSDK, the GUI names the APMs psu_apm_0-5 and I don't know where they are actually located since there is no numbering in the TRM.
How can I figure out which psu_apm the xSDK is referring to?
Regards,
so-lli1
08-26-2019 03:47 AM
Skip to bottom for solution. I just gave a way to use XSCT to extract this infor from HDF:
You can use the XSCT to open the HDF and read the APM in the design
You can dump the properties for each of these:
common::report_property [hsi::get_cells psu_apm_0]
So, If I just cross reference this register in the docs:
I updated the script to jump dump these:
hsi::open_hw_design hardware_description.hdf
foreach apm [hsi::get_cells *apm*] {
puts $apm
puts [common::get_property CONFIG.C_S_AXI_BASEADDR [hsi::get_cells $apm]]
}
hsi::close_hw_design [hsi::current_hw_design]
So, to clarify:
psu_apm_0: DDR_APM
psu_apm_1: APM_INTC_OCM
psu_apm_2: APM_LPD_FPD
psu_apm_5: AOM_CCI_INTC
This would be true for all designs as the address map on the PSU is hardened
08-26-2019 03:47 AM
Skip to bottom for solution. I just gave a way to use XSCT to extract this infor from HDF:
You can use the XSCT to open the HDF and read the APM in the design
You can dump the properties for each of these:
common::report_property [hsi::get_cells psu_apm_0]
So, If I just cross reference this register in the docs:
I updated the script to jump dump these:
hsi::open_hw_design hardware_description.hdf
foreach apm [hsi::get_cells *apm*] {
puts $apm
puts [common::get_property CONFIG.C_S_AXI_BASEADDR [hsi::get_cells $apm]]
}
hsi::close_hw_design [hsi::current_hw_design]
So, to clarify:
psu_apm_0: DDR_APM
psu_apm_1: APM_INTC_OCM
psu_apm_2: APM_LPD_FPD
psu_apm_5: AOM_CCI_INTC
This would be true for all designs as the address map on the PSU is hardened
08-26-2019 05:54 AM
@stephenm: Thank you for sharing the nice trick in order to figure out the base address of the APMs and not just the final solution. I wonder why Xilinx does not use the names directly when the address offset is hardcoded...
08-26-2019 06:20 AM
I have created a CR to have this added to the docs.