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so-lli1
Adventurer
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Registered: ‎11-26-2016

MPSoC APM Hardcores Numbering xSDK

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Hi,

In order to do some performance monitoring, I would like to use the internal APMs of the MPSoC. UG1085, Figure 15-1 shows where the APMs are located, further described in Chapter 15 - Axi Performance Monitor. However, when used with xSDK, the GUI names the APMs psu_apm_0-5 and I don't know where they are actually located since there is no numbering in the TRM.

How can I figure out which psu_apm the xSDK is referring to?

Regards,
so-lli1

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stephenm
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557 Views
Registered: ‎09-12-2007

Skip to bottom for solution. I just gave a way to use XSCT to extract this infor from HDF:

You can use the XSCT to open the HDF and read the APM in the design

apm.PNG

You can dump the properties for each of these:

common::report_property [hsi::get_cells psu_apm_0]

properties.PNG

So, If I just cross reference this register in the docs:

register.PNG

I updated the script to jump dump these:

hsi::open_hw_design hardware_description.hdf
foreach apm [hsi::get_cells *apm*] {
puts $apm
puts [common::get_property CONFIG.C_S_AXI_BASEADDR [hsi::get_cells $apm]]
}
hsi::close_hw_design [hsi::current_hw_design]

dump.PNG

 

apm_reg.PNG

 

So, to clarify:

psu_apm_0: DDR_APM

psu_apm_1: APM_INTC_OCM

psu_apm_2: APM_LPD_FPD

psu_apm_5: AOM_CCI_INTC

This would be true for all designs as the address map on the PSU is hardened

View solution in original post

3 Replies
stephenm
Moderator
Moderator
558 Views
Registered: ‎09-12-2007

Skip to bottom for solution. I just gave a way to use XSCT to extract this infor from HDF:

You can use the XSCT to open the HDF and read the APM in the design

apm.PNG

You can dump the properties for each of these:

common::report_property [hsi::get_cells psu_apm_0]

properties.PNG

So, If I just cross reference this register in the docs:

register.PNG

I updated the script to jump dump these:

hsi::open_hw_design hardware_description.hdf
foreach apm [hsi::get_cells *apm*] {
puts $apm
puts [common::get_property CONFIG.C_S_AXI_BASEADDR [hsi::get_cells $apm]]
}
hsi::close_hw_design [hsi::current_hw_design]

dump.PNG

 

apm_reg.PNG

 

So, to clarify:

psu_apm_0: DDR_APM

psu_apm_1: APM_INTC_OCM

psu_apm_2: APM_LPD_FPD

psu_apm_5: AOM_CCI_INTC

This would be true for all designs as the address map on the PSU is hardened

View solution in original post

so-lli1
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Adventurer
544 Views
Registered: ‎11-26-2016

@stephenm: Thank you for sharing the nice trick in order to figure out the base address of the APMs and not just the final solution. I wonder why Xilinx does not use the names directly when the address offset is hardcoded...

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stephenm
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535 Views
Registered: ‎09-12-2007

I have created a CR to have this added to the docs.

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